Multi-Phase Oversampled Detection for Lower Bit Error Rates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional oversampled data processing circuits do not provide significant bit error rate performance improvement over non-oversampled systems, struggling with latency, power dissipation, and accuracy in detecting data in reduced signal to noise ratio environments, especially when transferring higher density data patterns.
Innovation Solution
An oversampled data processing circuit with multiple detectors that samples a continuous signal at different phases, using multiple analog to digital converters and detectors to introduce time diversity, processing log likelihood ratios and branch metrics to enhance data detection accuracy, and incorporating digital finite impulse response filters and low pass filters for equalization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional oversampled data processing circuits are used, then sampling is performed at a rate greater than or equal to twice the baud rate, but there is no significant bit error rate performance improvement compared to non-oversampled systems
Solution Approach 1:
The data processing circuit is segmented into multiple parallel detection paths, each handling different sampling phases independently before combining results. This segmentation allows the system to process oversampled data more effectively by dividing the complex detection task into manageable parallel operations, improving bit error rate performance while maintaining manageable complexity through modular architecture
Solution Approach 2:
The invention transitions from single-phase detection to multi-phase detection by adding a temporal dimension to the detection process. By sampling and detecting data at multiple phase offsets (e.g., 0, 1/4, 1/2, 3/4 baud periods), the system exploits time diversity to improve reliability without significantly increasing overall system complexity
2Productivity
If detection is performed in reduced signal to noise ratio environments for higher density data patterns, then data transfer density increases, but current data processing circuits do not offer sufficient speed or accuracy
Solution Approach 1:
The system employs feedback mechanisms where detection results from one phase inform the detection process in subsequent phases. Log likelihood ratios and soft information are fed back through the detection pipeline, allowing each detection stage to benefit from previous detection outcomes, thereby maintaining high accuracy even in reduced signal-to-noise ratio environments associated with higher density data patterns
Solution Approach 2:
The invention changes detection parameters dynamically by adjusting sampling phases and detection thresholds based on signal conditions. By varying the sampling phase offsets and adapting detection parameters to match the reduced signal-to-noise ratio environment, the system maintains detection accuracy while supporting higher data transfer densities
3Measurement precision
If multiple analog to digital converters and detectors are added to process signals at different sampling phases, then time diversity is introduced to improve detection accuracy, but latency and power dissipation constraints are tightened
Solution Approach 1:
The invention merges multiple detection paths by combining log likelihood ratios and soft information from different sampling phases into a unified detection output. This combining approach allows the system to achieve improved detection accuracy through time diversity while sharing common processing resources across phases, thereby reducing overall power dissipation compared to having completely separate detection circuits for each phase
4Measurement precision
If multiple analog to digital converters and detectors are added to process signals at different sampling phases, then time diversity is introduced to improve detection accuracy, but latency constraints are tightened
Solution Approach 1:
The system maintains continuous operation across multiple sampling phases by processing detections in an overlapping pipeline manner. While one phase is being detected, other phases are already being processed or prepared, ensuring that the useful detection action continues without interruption. This continuous processing approach minimizes latency penalties despite having multiple detection paths
Data Source
AI summary
Various embodiments of the present invention provide apparatuses and methods for processing data in an oversampled data processing circuit with multiple detectors. For example, an apparatus for processing data is disclosed that includes a first analog to digital converter operable to sample a continuous signal at a first sampling phase to yield a first digital output, a second analog to digital converter operable to sample the continuous signal at a second sampling phase to yield a second digital output, wherein the second sampling phase is different from the first sampling phase, a first detector operable to process the first digital output to yield a first detector output, and a second detector operable to process the second digital output and the first detector output to yield a detected output.


