Multiphase Ring Frequency Divider for Large Divide Ratios

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Solution Overview

Problem

Existing frequency divider technologies require significant hardware and complexity to achieve large divide ratios, making them inefficient for applications requiring minimal hardware and flexible frequency division.

Innovation Solution

A moving spot sequencer configured as a ring using a multiphase clock to advance a 'one' through stages, allowing for arbitrary divide factors with minimal hardware by cascading one-spot structures, where the number of phases determines the divide factor and the frequency divider ratio is achieved through the advancement of a spot across stages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional frequency divider circuits are used to achieve large divide ratios, then the frequency division function is achieved, but the hardware complexity and circuit size increase significantly

Engineering Contradiction:
Improvehardware complexityVSAvoiddivide ratio
Core Design Contradiction:
Device complexityVSQuantity of substance

Solution Approach 1:

The frequency divider is segmented into multiple identical spot moving stages connected in a ring configuration. Each stage performs the same function (advancing the spot by one position), and the overall divide ratio is achieved by the cumulative effect of traversing all stages. This segmentation allows the circuit to achieve large divide ratios without proportionally increasing the complexity of individual circuit elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each spot moving stage is a universal building block that can be reused multiple times in the ring. The same stage design is instantiated N times to achieve a divide-by-N function, where N can be arbitrarily large. This universality allows the circuit to scale to large divide ratios while maintaining consistent hardware complexity per stage.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If the number of stages is increased to achieve larger divide ratios, then the frequency division capability is improved, but the hardware requirements increase

Engineering Contradiction:
Improvefrequency division flexibilityVSAvoidhardware requirements
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The spot moving stage incorporates dynamic control through clock signals that advance the spot position. The divide ratio is determined by the number of clock cycles required for the spot to complete one full traversal of the ring, allowing flexible frequency division without physically reconfiguring the hardware. The system adapts different divide ratios by varying the clock phase relationships rather than changing the physical structure.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If minimal hardware is used to achieve frequency division, then hardware efficiency is improved, but the ability to achieve arbitrary divide ratios is limited

Engineering Contradiction:
Improvehardware usageVSAvoiddivide ratio flexibility
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The invention changes the parameter of clock phase relationships to achieve different divide ratios. By varying which clock phases are applied to which stages in the ring, the system can implement arbitrary divide ratios without changing the physical hardware configuration. This parameter-based control allows minimal hardware to achieve maximum versatility.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7812648B2Frequency divider
Publication Date: 2010.10.12 ANALOG DEVICES INC
  • US7812648B2 patent drawing
  • US7812648B2 patent drawing
  • US7812648B2 patent drawing

AI summary

A frequency divider using a clock source with a plurality of phase signals of a multi-phase oscillator. In one version, the divider includes a plurality of spot-moving stages that are connected to form a ring. Spot-moving stages are stages that advance a one or a zero, while clearing the previous stage. Depending on the number of stages and the number of phases of the clock to advance a spot through all of the stages, a divider ratio is determined. In another embodiment, a plurality of latch elements is provided with a divided input and each is re-clocked with the phases of a multi-phase oscillator. The outputs of the latch elements are combined in a capacitor array to create the output waveform. An interpolator useful in conjunction with a frequency divider is also disclosed. When the interpolator is placed in the feedback path of a PLL, a fractional frequency multiplier/divider results.