Multi-Phase Signal Detection Circuit for Accurate Valid Data Sensing
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Solution Overview
Problem
Existing signal detection circuits in communication systems face accuracy issues due to signal attenuation, noise interference, and increased manufacturing costs, particularly when using rectifiers, switching circuits, and high-gain latch circuits, especially when dealing with small amplitude signals and asynchronous sampling.
Innovation Solution
A signal detection circuit that employs multiple clock signals with lower frequencies and varying phases to sample high-speed input signals, avoiding transition times and reducing the need for over-sampling, thereby simplifying the design and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If rectifier is used for signal detection, then the circuit structure is simple, but the input signal is attenuated causing poor accuracy for small amplitude signals
Solution Approach 1:
The signal detection function is divided into multiple sampling operations using different clock phases. Instead of using a single rectifier that attenuates the signal, the patent segments the detection process into multiple sampling stages, each capturing signal characteristics at different phases, thereby maintaining signal integrity while achieving detection.
Solution Approach 2:
The patent employs periodic sampling using multiple clock signals with different phases to detect the input signal. This periodic action allows the circuit to capture signal characteristics over multiple cycles, avoiding the attenuation problem of rectifiers while maintaining detection accuracy through temporal sampling patterns.
2Speed
If switching circuit sampling technology is used, then the circuit response is fast, but the input signal amplitude must be greater than the turn-on voltage causing noise interference for small signals
Solution Approach 1:
The patent introduces clock signals as an intermediary mechanism to sample the input signal without requiring direct transistor switching based on signal amplitude. The clock signals control the sampling process, allowing small amplitude signals to be detected accurately without being subject to transistor turn-on voltage thresholds that would otherwise cause noise interference.
3Measurement precision
If high-gain latch circuit sampling technology is used, then the signal amplification is sufficient, but multiple latch circuits are needed for over-sampling increasing device complexity and manufacturing cost
Solution Approach 1:
The patent makes a single latch circuit multi-functional by using it in conjunction with multiple clock phases. Instead of requiring multiple latch circuits for over-sampling, the same latch circuit performs multiple sampling functions by being controlled by different phase clock signals, thereby reducing device complexity while maintaining detection accuracy.
Solution Approach 2:
The patent uses periodic clock signals with different phases to control a single latch circuit for multiple sampling operations. This periodic action allows one latch circuit to perform the work of multiple circuits by sampling at different phases sequentially, reducing the total number of latch circuits needed while maintaining over-sampling benefits.
4Measurement precision
If over-sampling method is used to ensure non-transition sampling, then signal detection accuracy is improved, but the load on input signal increases and manufacturing cost increases
Solution Approach 1:
The patent segments the sampling function across multiple clock phases rather than using multiple latch circuits simultaneously. This segmentation allows accurate non-transition sampling to be achieved by distributing the sampling load across different time phases, reducing the instantaneous load on the input signal while maintaining detection accuracy.
Data Source
AI summary
The present invention provides a signal detection circuit, wherein the signal detection circuit includes a sampling circuit and a determination circuit. In the operations of the signal detection circuit, the sampling circuit uses a plurality of clock signals to sample an input signal to generate a sampling result, wherein the plurality of clock signals have different phases, and frequencies of the plurality of clock signals are lower than a frequency of the input signal. The determination circuit refers to the sampling result to determine if the input signal comprises valid data, so as to determine if the input signal comes from outside a chip, wherein the chip includes the signal detection circuit.