Multi-Phase Signal Generation for Deterministic Mode Switching
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Solution Overview
Problem
Existing multi-phase signal generation systems face indeterministic phase shifts and increased power consumption during transitions between different phase modes, which can disrupt phase-locked loop stability and fail to meet industry standards for wireless communication.
Innovation Solution
A system that maintains a deterministic phase relationship between phase signals by using the same periodic binary signals and steady state signals in both modes, along with a frequency divider and buffer to stabilize the clock generator load, allowing seamless transitions between 2^n and 2^(n-1) phase signals without altering the load on the phase-locked loop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different periodic binary signals are used to control phase signal generation stages in different modes, then phase mode switching is enabled, but indeterministic phase shifts occur and phase-locked loop stability is disrupted
Solution Approach 1:
The patent applies preliminary action by pre-configuring the phase signal generation stages to use the same periodic binary signal for both first and second modes. This preliminary setup ensures that when mode switching occurs, the phase relationships remain deterministic and the phase-locked loop maintains stability, eliminating the need for post-switching phase recalibration.
2Productivity
If active periodic binary signals are used in the second mode instead of steady state signals, then phase signal generation is maintained, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the signal type (active periodic binary or steady state) dynamically adjustable based on the operational mode. In the first mode, active periodic binary signals are used to generate multiple phase signals, while in the second mode, steady state signals are used to maintain phase signal generation with reduced power consumption, optimizing energy efficiency across different operating conditions.
3Adaptability or versatility
If the load on the clock generator is altered during mode transitions, then mode switching is flexible, but transition time increases and real-time switching is prevented
Solution Approach 1:
The patent applies preliminary action by pre-configuring the clock generator to maintain a constant load regardless of the operational mode. This is achieved by ensuring that the same number of phase signal generation stages are connected to the clock generator in both modes, eliminating load transitions and enabling real-time mode switching without phase-locked loop destabilization.
4Ease of operation
If phase modes are switched without maintaining deterministic phase relationships, then mode transitions are simple, but industry standard compliance is failed
Solution Approach 1:
The patent applies preliminary action by pre-establishing deterministic phase relationships through the use of the same periodic binary signal across both operational modes. This preliminary configuration ensures that phase transitions between modes are predictable and precise, maintaining compliance with industry standards while keeping the transition mechanism simple and straightforward.
Data Source
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AI summary
The disclosure relates to technology for generating multi-phase signals. An apparatus includes 2^n phase signal generation stages. The apparatus also includes a controller configured to provide a mode input of each of the 2^n stages with an active periodic binary signal with remaining inputs of each of the 2^n stages provided with another periodic binary signal to collectively generate a 2^n phase signal in a first mode. The controller is further configured to provide the mode input of each of 2^(n-1) odd stages with a first steady state signal and the mode input of each of 2^(n-1) even stages with a second steady state signal with remaining inputs of each of the 2^n stages provided with the same periodic binary signal as in the first mode to cause either the 2^(n-1) odd stages or the 2^(n-1) even stages to collectively generate a 2^ (n-1) phase signal in a second mode.