Multi-Phase Signal Calibration Circuit for Low-Jitter Phase Alignment
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Solution Overview
Problem
Conventional semiconductor devices require a long delay to adjust phases of multi-phase signals, leading to increased jitter and decreased signal quality, as only three phases are adjustable while the fourth phase is fixed.
Innovation Solution
A semiconductor device with a signal delay circuit and calibration circuit that uses variable delay codes to adjust all phases of multi-phase signals, including a filter that updates delay codes based on phase difference information to maintain constant phase differences between adjacent signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a fixed delay circuit is used to adjust phases of multi-phase signals, then phase adjustment is achieved, but the delay amount is long causing increased jitter and decreased signal quality
Solution Approach 1:
The patent applies dynamics by replacing the fixed delay circuit with a variable delay circuit where the delay amount can be dynamically adjusted through calibration. The delay codes are made variable and can be updated based on measured phase differences, allowing the system to adaptively optimize the delay amount rather than using a fixed predetermined value.
Solution Approach 2:
The patent implements feedback by using an error detection circuit to measure actual phase differences between multi-phase signals and feed this information back to a calibration circuit. The calibration circuit then adjusts the delay codes based on this feedback to minimize phase differences, creating a closed-loop control system that continuously optimizes signal quality.
2Device complexity
If only three phases are adjusted among four-phase signals, then phase adjustment is simplified, but the remaining fixed phase causes suboptimal signal quality
Solution Approach 1:
The patent applies universality by designing a calibration system that can adjust all four phases of the multi-phase signals rather than limiting adjustment to only three phases. The variable delay circuit and calibration mechanism are configured to accommodate and optimize all phases, making the system more versatile and effective.
Solution Approach 2:
The patent implements self-service through an automated calibration process where the error detection circuit automatically measures phase differences and the calibration circuit automatically adjusts delay codes without manual intervention. This self-calibrating mechanism ensures all phases are optimized consistently.
3Manufacturing precision
If a long delay is applied to adjust phases, then phase alignment is achieved, but jitter increases and signal quality deteriorates
Solution Approach 1:
The patent applies dynamics by making the delay amount variable rather than fixed. The variable delay circuit allows the delay time to be optimized to the minimum necessary value for achieving phase alignment, rather than applying a predetermined long delay that causes excessive jitter and time loss.
Solution Approach 2:
The patent implements parameter changes by adjusting the delay code parameters through calibration. The error detection circuit measures actual phase differences and the calibration circuit modifies the delay code parameters to achieve optimal phase alignment with minimal delay, rather than using fixed delay parameters.
Data Source
AI summary
A semiconductor device includes a signal delay circuit configured to output a plurality of multi-phase output signals by delaying a plurality of multi-phase input signals according to a plurality of delay codes, respectively; and a calibration circuit including an error detection circuit configured to provide phase difference information between signals selected among the plurality of the multi-phase output signals according to a variable delay code and a filter configured to provide the plurality of delay codes and the variable delay code, wherein the filter performs update operation to update the plurality of delay codes or the variable delay code.