Write Training Circuit With Multi-Phase Strobe Skew Detection
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Solution Overview
Problem
Conventional semiconductor memory apparatuses perform write leveling and write training operations sequentially, increasing the time required for data input and output due to separate execution from normal operations.
Innovation Solution
A write training circuit that includes a data receiving circuit, strobe signal processing circuit, and skew detection circuit, allowing for parallel execution of write training operations with data input/output and erase operations using multi-phase clock signals to determine optimal latching times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If write training operation is performed separately from normal operations, then write training can be completed with sufficient time, but the total time required for data input and output increases
Solution Approach 1:
The patent combines write training operation with normal data input/output operations by using the same data strobe signal for both purposes. The write training circuit internally multi-phases the data strobe signal to determine optimal latching times while the memory apparatus simultaneously performs normal data input/output operations, eliminating the need for separate write training time periods.
Solution Approach 2:
The data strobe signal serves multiple functions: it is used both for normal data input/output operations and for write training operations. The write training circuit uses the same data strobe signal to internally determine latching times, allowing the system to perform write training without requiring additional dedicated signals or time periods.
2Reliability
If write training operation is performed in a separate time period, then the operation can be completed without interfering with normal operations, but productivity decreases
Solution Approach 1:
The patent merges write training operation with normal data input/output operations into a single time period. The write training circuit operates internally using the same data strobe signal while the memory apparatus continues normal operations, allowing both functions to be performed simultaneously without interfering with each other.
Solution Approach 2:
The system maintains continuous data input/output operations without interruption for write training. The write training circuit performs its function internally using the ongoing data strobe signal, ensuring that normal operations continue uninterrupted while write training is simultaneously completed.
3Ease of operation
If write training operation is performed separately, then external control can manage the operation easily, but the time required for data input and output increases
Solution Approach 1:
The data strobe signal serves dual purposes: normal data input/output and write training operations. This eliminates the need for separate control mechanisms for write training, as the same signal and timing infrastructure is used for both functions.
Solution Approach 2:
The write training circuit performs write training automatically using the incoming data strobe signal without requiring separate external control commands. The circuit internally multi-phases the signal and determines optimal latching times autonomously, reducing external control overhead while maintaining simplicity.
Data Source
AI summary
A write training circuit includes a data receiving circuit, a strobe signal processing circuit, and a skew detection circuit. The data receiving circuit receives data input according to a plurality of multi-phase clock signals to generates received data. The strobe signal processing circuit generates the plurality of multi-phase clock signals by dividing a data strobe signal into divided signals and delaying the divided signals by a predetermined time period. The skew detection circuit generates a replication clock signal corresponding to one of the plurality of multi-phase clock signals and generates skew information according to the replication clock signal. The skew detection circuit generates the skew information under external control or independently of external control depending on which of a plurality of external commands is received.