Multi-Plane Memory Headroom Management for Parallel High-Current Access
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Solution Overview
Problem
In multi-plane memory devices, concurrent high current events can exceed the available current headroom, leading to decreased performance or failure of operations due to independent plane driver circuits operating without communication mechanisms for scheduling high current events.
Innovation Solution
Implement a headroom management component that tracks and arbitrates high current events across multiple planes, delaying requests when the threshold is exceeded to maintain current headroom and prevent peak current overload.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple independent plane driver circuits operate concurrently without communication mechanisms, then parallel access speed and productivity are improved, but peak current demand exceeds available current headroom causing operation failure
Solution Approach 1:
The patent implements a feedback mechanism where plane driver circuits communicate their high current event status to a management component, which then coordinates access to prevent simultaneous high current events. This feedback loop allows the system to maintain high productivity by enabling concurrent operations while ensuring reliability by preventing current overload through coordinated scheduling.
Solution Approach 2:
The patent introduces a management component as an intermediary between independent plane driver circuits. This mediator tracks and coordinates high current events across multiple planes, allowing parallel access to proceed efficiently while preventing peak current overload by scheduling operations to avoid simultaneous high current demands.
2Reliability
If high current events are delayed to maintain current headroom, then reliability is improved, but latency increases
Solution Approach 1:
The management component performs preliminary tracking and scheduling of high current events before they occur. By anticipating and coordinating these events in advance, the system can maintain current headroom without causing unnecessary delays, as operations are scheduled optimally rather than being reactively delayed.
Solution Approach 2:
The patent implements dynamic scheduling where the coordination of high current events is flexible and adaptive rather than static. The management component adjusts scheduling based on actual operation patterns and current headroom conditions, minimizing delays while maintaining reliability.
Data Source
AI summary
A memory device includes a memory array comprising a plurality of planes and a plurality of independent plane driver circuits. The memory device further includes control logic to receive a request for one of the plurality of independent plane driver circuits to execute a high current event on a corresponding one of the plurality of planes in the memory device. The control logic is further to increment a counter tracking a number of high current events occurring in the memory device, and determine whether the number of high current events occurring in the memory device satisfies a threshold criterion. Responsive to determining that the number of high current events occurring in the memory device satisfies the threshold criterion, the control logic is to cause execution of the high current event to be delayed.