Multiple Die Grouping Structure for Simultaneous Interposer Placement

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Solution Overview

Problem

Current semiconductor integrated circuit (IC) packaging technologies face challenges in efficiently reducing density and improving performance, particularly in the configuration and placement of multiple ICs within a single packaged device, which affects production efficiency and costs.

Innovation Solution

A method for fabricating multichip structures that involves partial and full cuts during the dicing process to form die groupings, allowing for simultaneous placement of multiple dies on an interposer substrate, reducing pick-and-place operations and enhancing dimensional control, using techniques like chip-on-wafer-on-substrate (CoWoS) technology.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple ICs are included in a packaged device using conventional packaging technologies, then functional density is increased, but production efficiency decreases and costs increase due to complex configuration and placement processes

Engineering Contradiction:
Improvenumber of ICs per packaged deviceVSAvoidproduction efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The wafer is divided into multiple die groupings, where each grouping contains multiple dies that are kept together as a unit during the dicing process. This segmentation allows the dies within each grouping to be placed simultaneously on the substrate, reducing the number of pick-and-place operations required and improving production efficiency while maintaining high functional density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple dies are merged into groupings that remain connected through portions of scribe lines during the dicing process. These die groupings are then placed and attached to the substrate as unified units, enabling simultaneous placement of multiple dies and reducing overall processing time and complexity

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If conventional dicing processes are used to separate individual dies, then complete separation is achieved, but processing time and costs increase due to sequential pick-and-place operations

Engineering Contradiction:
Improvedimensional controlVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The dicing process performs partial cuts through scribe lines to create die groupings that are pre-configured with controlled spacing and positioning. This preliminary action establishes precise dimensional relationships between dies within each grouping before placement, enabling simultaneous attachment to the substrate while maintaining accurate dimensional control

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of performing complete cuts through all scribe lines to separate individual dies, the process applies partial cuts that remove only portions of the scribe lines. This partial action is sufficient to create the desired die groupings with controlled spacing, reducing processing time while maintaining adequate dimensional control for subsequent placement operations

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20240087902A1Multiple die structure and method of fabricating thereof
Publication Date: 2024.03.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240087902A1 patent drawing
  • US20240087902A1 patent drawing
  • US20240087902A1 patent drawing

AI summary

The present disclosure is directed to methods and devices for devices including multiple die. A wafer is received having a plurality of die and a plurality of scribe lines. A dicing process is performed on the wafer. The dicing process includes identifying a first scribe line of the plurality of scribe lines, the first scribe line interposing a first die and a second die of the plurality of die; and performing a partial cut on the first scribe line. In embodiments, other scribe lines of the wafer are, during the dicing process, fully cut. After the dicing, the first die and the second die are mounted on a substrate such as an interposer. The first die and the second die are connected by a portion of the first scribe line, e.g., remaining from the partial cut, during the mounting.