Multiple Die Package Using Leadframes and Insulator Vias
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Solution Overview
Problem
Existing multiple integrated circuit packaging methods are complex and costly, requiring expensive interposers, printed circuit boards, and substrates, which increase manufacturing costs and complexity, especially when dealing with identical devices that need arbitrary connections.
Innovation Solution
A packaging method using leadframes and an insulator layer with through-hole vias allows for arbitrary electrical connections between integrated circuit dies without the need for complex interposers, using conventional wire bonding and flip chip technologies, eliminating the requirement for specialized equipment or retooling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional multiple integrated circuit packaging methods are used with interposers and substrates, then reliable electrical connectivity between multiple integrated circuits is achieved, but manufacturing cost and device complexity increase significantly
Solution Approach 1:
The patent extracts and eliminates the interposer layer from the traditional packaging structure. By directly bonding leadframes to the substrate and routing traces between them, the invention removes the intermediate interposer component while maintaining electrical connectivity functionality, thereby reducing device complexity and manufacturing cost
Solution Approach 2:
The patent merges the functions of multiple separate components (interposer, substrates, leadframes) into a simplified integrated structure. The leadframes directly bonded to the substrate perform both mechanical support and electrical interconnection functions that were previously distributed across multiple layers, reducing overall packaging complexity
2Adaptability or versatility
If expensive interposers and substrates are used for multiple integrated circuit packaging, then arbitrary connections between integrated circuits are enabled, but manufacturing cost increases
Solution Approach 1:
The patent segments the packaging structure into discrete leadframe components that can be independently designed and positioned. Each leadframe can be separately bonded to the substrate and routed to create arbitrary connection patterns, providing connection flexibility without requiring expensive pre-fabricated interposers
Solution Approach 2:
The patent uses the substrate as an intermediary platform that directly receives and interconnects multiple leadframes. The substrate's trace routing capability provides the arbitrary connection functionality previously requiring complex interposers, while the leadframes serve as modular intermediaries between integrated circuits and the substrate
3Reliability
If complex packaging structures with multiple layers are used, then electrical connections between multiple integrated circuits are achieved, but manufacturing complexity and equipment requirements increase
Solution Approach 1:
The patent inverts the traditional packaging sequence by bonding leadframes to the substrate first, then mounting integrated circuits to the leadframes. This reversal eliminates the need for complex multi-layer interposer structures and enables simpler manufacturing processes using conventional wire bonding and reflow techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the packaging process, reduces costs, and enables reliable electrical connectivity between multiple integrated circuits without the need for expensive substrates or interposers, allowing for flexible connection configurations and reduced manufacturing complexity.
Implementation Method 1
an insulator layer with through-hole vias allows for arbitrary electrical connections between integrated circuit dies
Implementation Method 2
The wire bonding process uses heat and pressure and sometimes other energies, such as ultrasonic energy, to form a bond by attaching a wire to the integrated circuit bond pad
Implementation Method 3
The wire bonding process uses heat and pressure and sometimes other energies, such as ultrasonic energy, to form a bond by attaching a wire to the integrated circuit bond pad
Implementation Method 4
leadframes are used in the semiconductor packaging art, to provide mechanical support and to make electrical connections between the integrated circuits and the exterior electrical contacts or leads of the packaged device
Implementation Method 5
which are often coated to increase conductivity and solderability with materials such as gold, ruthenium, palladium, and the like
Implementation Method 6
liquid or molten mold compound material is dispensed to encapsulate the leadframe and integrated circuit together, so as to provide mechanical protection and some degree of moisture resistance to the die
Data Source
AI summary
A multiple die package and removable storage card is disclosed. An insulator layer is provided and one or more vias are formed within it. The insulator may be provided without vias, and vias formed later. At least one integrated circuit is provided and electrically coupled to at least one lead of a first leadframe overlying one surface of the insulator layer. At least one second integrated circuit is provided and electrically coupled to a second leadframe overlying a second surface of the insulator layer. Electrical connections between the two leadframes and the first and second integrated circuits are made through the insulator, at selected locations, by coupling at least one lead of the first and second leadframes one to another. The leads of the first and second leadframe may be electrically coupled via anisotropically conductive areas of the leadframes.