Multiple Flit Interface Credit Control for Chiplet Power Reduction
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Solution Overview
Problem
Conventional flow control mechanisms in chiplet systems are inefficient, as they require one credit per flit, leading to increased processing cycles and power consumption in managing network traffic and credit returns, especially in systems with multiple flits transmitted over a wide bus.
Innovation Solution
Implementing a credit-based flow control system that uses a multiple flit interface, where credits are returned based on transfer cycles rather than the number of flits, reducing the computational load on receivers and minimizing the number of data packets needed for credit return, thereby optimizing processing and power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If one credit is used for each flit in conventional flow control, then flow control accuracy is improved, but processing cycles and power consumption increase
Solution Approach 1:
The patent merges multiple flit credit tracking into a single packet-level credit mechanism. Instead of managing separate credits for each flit, the system allocates credits at the packet level and tracks buffer availability for entire packets, reducing the number of credit management operations while maintaining flow control accuracy.
Solution Approach 2:
The credit mechanism is designed to serve multiple functions simultaneously: it tracks buffer availability, enables packet-level flow control, and supports virtual channel management. This multi-functional approach eliminates the need for separate credit tracking mechanisms for different purposes, reducing overall processing overhead.
2Measurement precision
If one credit is used for each flit in conventional flow control, then flow control accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple flit credit tracking into a single packet-level credit mechanism. Instead of managing separate credits for each flit, the system allocates credits at the packet level and tracks buffer availability for entire packets, reducing the number of credit management operations while maintaining flow control accuracy.
Solution Approach 2:
The patent changes the granularity of credit tracking from individual flits to packets. By shifting the measurement unit from flit-level to packet-level, the system reduces the number of state variables that need to be tracked and managed, thereby simplifying the device complexity while preserving essential flow control functionality.
3Speed
If multiple flits are transmitted over a wide bus, then data transfer speed is improved, but networking overhead increases
Solution Approach 1:
The patent merges credit return operations by batching them at the packet level rather than processing them individually for each flit. This reduces the number of credit return messages and associated processing, thereby reducing networking overhead while maintaining the high-speed benefits of wide bus transmission.
Solution Approach 2:
The patent extracts credit return processing from the flit-level transmission stream and handles it separately at the packet level. This separation allows the data transmission to proceed at high speed without being burdened by frequent credit management interruptions, reducing the impact of networking overhead on transfer performance.
Data Source
AI summary
Implementations of the present disclosure are directed to systems and methods for flow control using a multiple flit interface. A credit return field is used in a credit-based flow control system to indicate that one or more credits are being returned to a sending device from a receiving device. Based on the number of credits available, the sending device determines whether to send device or wait until more credits are returned. The amount of buffer space used by the receiver to store the packet is determined by the number of transfer cycles used to receive the packet, not the number of flits comprising the packet. This is enabled by having the buffer be as wide as the bus. The receiver returns credits to the sender based on the number of buffer rows used to store the received packet, not the number of flits comprising the packet.


