Multiple Fuse Cell Architecture for High Voltage Programming
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Solution Overview
Problem
Existing fuse structures in integrated circuits face yield loss due to stress on on-chip active devices caused by high programming voltages, which can either fail to blow the fuse or damage the circuitry, leading to inaccuracies in resistor trimming and increased production costs.
Innovation Solution
A multiple fuse structure architecture is employed where the terminals of the fuse structures are kept at ground potential or lower during programming, allowing for a higher programming voltage to be applied without damaging on-chip devices, ensuring that fuse structures with unexpectedly high resistance can be blown without harming nearby components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high programming voltage is applied across the fuse to ensure the fuse is blown, then the fuse can be successfully programmed, but the on-chip active devices are exposed to over-voltage stress that may cause damage
Solution Approach 1:
The fuse structure is divided into multiple segments (first fuse structure and second fuse structure) connected in series between the fuse pad and ground. This segmentation allows the high programming voltage to be distributed across multiple fuse structures rather than applied directly across a single fuse, thereby reducing the voltage stress on any individual fuse and on connected on-chip devices while still achieving successful fuse blowing when sufficient total voltage is applied.
2Reliability
If higher voltage is used to ensure fuses are blown when resistance is higher than expected, then fuse programming reliability improves, but the risk of damaging on-chip circuitry increases
Solution Approach 1:
The patent implements a cushioning mechanism by connecting multiple fuse structures in series between the fuse pad and ground. This series configuration acts as a voltage buffer that prevents excessive voltage from reaching on-chip devices during the fuse blowing process. The multiple fuse structures absorb and distribute the voltage stress, providing prior protection against potential damage to sensitive on-chip circuitry while ensuring reliable fuse programming.
3Object-affected harmful factors
If voltage is not high enough to blow the fuse, then on-chip devices are protected from damage, but the fuse may remain intact causing yield loss
Solution Approach 1:
The patent changes the electrical parameters of the fuse structure by using multiple fuse structures with specific resistance values connected in series. This parameter modification allows the system to achieve a balance where the total resistance is high enough to protect on-chip devices from over-voltage stress, yet the series configuration enables sufficient current flow when appropriate voltage is applied to successfully blow the fuse and achieve the desired trimming result, thereby maintaining production yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces yield loss in mass production by ensuring accurate trimming of resistors while preventing damage to on-chip devices, thereby improving production yield and reducing costs.
Implementation Method 1
passing a large current between the bond pads, causing the fuse material to vaporize
Implementation Method 2
the terminals of the fuse structures are kept at ground potential or lower during programming
Data Source
AI summary
The fuse cell architecture 371 for the presently claimed invention employs a multiple fuse structure 301, 302 architecture in lieu of a single fuse structure. As such, the terminals of these fuse structures that couple to other on-chip devices are always at ground potential throughout the application of programming voltage to the fuse pads 311. This approach overcomes previous single fuse problems owing to the fact that a sufficiently high programming voltage can be applied to blow fuse structures with unexpectedly high resistance without damaging nearby on-chip devices. Furthermore, even if one of the fuse structures 301, 302 possessed an abnormally high resistance which would not be blown under typical conditions, the desired circuit trimming result can still be achieved owing to the blowing of the other fuse structure in the fuse cell 371.