Multiple Height Cell Sub-Cell Segmentation for IC Layout

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Solution Overview

Problem

Integrated circuits face limitations in design flexibility and integration due to the presence of unused regions in multiple height cells, which reduce the degree of freedom and increase the size of the circuit.

Innovation Solution

The integration circuit design includes multiple height cells arranged in sub-cell units with internal connections, eliminating unused regions and allowing for flexible arrangement of sub-cells across rows, thereby increasing design freedom and integration efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If multiple height cells are arranged in traditional configurations, then design flexibility is maintained, but unused regions increase circuit size and reduce integration density

Engineering Contradiction:
Improvecircuit sizeVSAvoiddesign flexibility
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The multiple height cell is divided into sub-cell units (first sub-cell and second sub-cell) that can be independently arranged and connected. This segmentation allows the cell to adapt to different row configurations while eliminating unused regions, thereby reducing circuit size without sacrificing design flexibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces internal connection patterns that connect conductive patterns across different rows (first row and second row) vertically. This multi-dimensional arrangement allows sub-cells to be distributed across multiple rows while maintaining electrical connectivity, eliminating the need for continuous unused regions and improving integration density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If multiple height cells are used to provide design flexibility, then the degree of freedom increases, but unused regions reduce integration efficiency

Engineering Contradiction:
Improvedegree of freedomVSAvoidintegration efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The multiple height cell structure with sub-cell units and internal connections serves multiple functions: it provides design flexibility for different row configurations, eliminates unused regions to improve integration density, and maintains electrical connectivity across rows. This multi-functional design simultaneously achieves both degree of freedom and integration efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The internal connection patterns ensure continuous electrical connectivity between sub-cells across different rows, eliminating gaps or unused regions. This continuous useful action maximizes the utilization of the cell area, improving integration efficiency while maintaining design flexibility through various arrangement options.

Inventive Principle:
Principle #20Continuity of useful action

3Ease of manufacture

If traditional cell arrangements are used, then manufacturing simplicity is maintained, but design integration is limited

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoiddesign integration
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

By segmenting the multiple height cell into standardized sub-cell units with defined internal connections, the patent enables modular manufacturing processes. The segmented structure can be manufactured using standard photolithography and etching techniques while achieving complex integrated designs, thus maintaining manufacturing simplicity despite enhanced design integration capabilities.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11410988B2Integrated circuit including multiple height cell and method of designing the same
Publication Date: 2022.08.09 SAMSUNG ELECTRONICS CO LTD
  • US11410988B2 patent drawing
  • US11410988B2 patent drawing
  • US11410988B2 patent drawing

AI summary

An integrated circuit includes a standard cell continuously arranged on a first row and on a second row, the first row and second row extending parallel with each other in a first direction, the first row and the second row adjacent to each other in a second direction crossing the first direction, a first cell separator contacting a first row boundary of the standard cell on the first row and extending in the second direction, and a second cell separator contacting a second row boundary of the standard cell on the second row and extending in the second direction. The first cell separator and the second cell separator are discontinuous on a first row to second row boundary of the first row and the second row.