Multiple-Input Comparator Circuit for Power Converter Duty Cycle Control
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Solution Overview
Problem
Conventional PWM comparator circuits are complex and limited by the responsive speed of operational amplifiers, making them inefficient for adjusting duty cycles in power converters, especially when the input voltage is much larger than the output voltage, leading to saturation of error amplifier output and reduced gain.
Innovation Solution
A multiple-input comparator design utilizing a pair of differential transistors connected by resistors, with one terminal connected to a current source or sink, allowing for simpler circuit structure and enhanced responsive speed by injecting or extracting current to adjust the saw-tooth wave signal, thereby overcoming the limitations of conventional circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional operational amplifier-based circuit is used to enhance the saw-tooth wave signal, then the signal can be enhanced by a certain voltage, but the circuit becomes very complicated and is restricted by the responsive speed of the operational amplifier
Solution Approach 1:
The patent extracts the signal enhancement function from the complex operational amplifier-based enhancement circuit and integrates it directly into the PWM comparator structure. By using the existing differential transistor pair and adding only a current source connected to the tail node, the enhancement voltage is generated internally through current modulation, eliminating the need for separate enhancement components while maintaining the required voltage offset.
Solution Approach 2:
The patent merges the signal enhancement function with the PWM comparator operation. The current source connected to the tail node of the differential transistor pair simultaneously provides bias current and generates the enhancement voltage by modulating the tail current. This integration combines multiple functions (comparison and enhancement) into a single unified structure, reducing overall circuit complexity.
2Device complexity
If the valley voltage of the saw-tooth wave signal is 0 volt, then the circuit is simple, but the error amplifying signal needs to be near 0 volt when duty cycle is very small, causing the error amplifier output to saturate and gain to decrease significantly
Solution Approach 1:
The patent applies preliminary anti-action by pre-establishing an enhancement voltage through the current source connected to the tail node before the comparison operation begins. This enhancement voltage is continuously present and prevents the error amplifier from entering saturation by ensuring the differential transistor pair maintains proper operating conditions even when the duty cycle is very small and the error amplifying signal is near 0 volt.
3Device complexity
If a conventional PWM comparator is used, then the circuit structure is straightforward, but the responsive speed is limited by the operational amplifier
Solution Approach 1:
The patent substitutes the operational amplifier-based voltage comparison mechanism with a direct current-based comparison mechanism using a differential transistor pair. By eliminating the operational amplifier and its associated feedback loops, the circuit achieves faster response time while maintaining a relatively simple structure. The current source provides instantaneous current modulation without the bandwidth limitations of operational amplifiers.
Data Source
AI summary
A multiple-input comparator is disclosed. The multiple-input comparator includes a pair of differential transistors connected by a resister. The gate terminals of the transistor pair serve as the input terminals of the comparator for receiving external voltage for comparison. The terminal of the resistor serves as the current input terminal and is either connected to a current source or a current sink. A power inverter utilizing the multiple-input comparator is also disclosed.