Multiple-Mask Lithography for Large IC Fabrication
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Solution Overview
Problem
The semiconductor industry faces limitations in fabricating larger integrated circuits due to the size constraints of individual masks used in lithography, as the exposed area by a single mask sets a maximum size for the circuit, hindering the formation of larger circuits without complex and precise alignment of multiple masks in a multiple-mask multiple-exposure process.
Innovation Solution
A set of masks and a technique for exposing a single photoresist using different masks at various locations to form a monolithic integrated circuit, with alignment marks and stitching regions to ensure correct alignment, allowing for the formation of larger circuits by subdividing a layout into mask regions and using alignment zones and stitching zones to manage overlapping exposures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a single mask is used in lithography, then the mask structure is simple and easy to manufacture, but the exposed area is limited which sets a maximum size for the circuit
Solution Approach 1:
The patent divides the lithography process into multiple exposure steps using different masks. Each mask is responsible for exposing a specific portion of the photoresist, allowing the total exposed area to exceed the size of any single mask. This segmentation enables larger circuit fabrication while keeping individual masks manageable in size and complexity.
Solution Approach 2:
The patent combines multiple mask exposures to achieve a total exposed area that is the union of all individual mask exposure areas. By merging the exposure results from multiple masks, the system creates a larger overall pattern that would be impossible to achieve with a single mask, thus increasing the circuit size capability.
2Area of stationary object
If multiple masks are used to expose different portions of photoresist, then larger circuits can be formed, but precise alignment between masks becomes required which increases process complexity
Solution Approach 1:
The patent incorporates alignment marks on the photoresist that are formed before the actual circuit patterning. These alignment marks serve as reference features that enable precise alignment of multiple masks during the exposure process. By establishing these reference points in advance, the system ensures accurate registration between different mask exposures, reducing the overall alignment difficulty.
Solution Approach 2:
The patent uses alignment marks and measurement structures to monitor and verify the alignment between different masks. By measuring the position of alignment marks and comparing them against expected locations, the system provides feedback that can be used to adjust subsequent mask alignments, ensuring high precision in the final pattern.
3Area of stationary object
If multiple masks expose overlapping portions of photoresist, then complete coverage is achieved, but feature conflicts may occur between masks
Solution Approach 1:
The patent assigns different functional characteristics to different regions of the photoresist based on which mask exposes them. By tracking which mask exposes each local region, the system can apply appropriate processing steps to ensure feature consistency. Overlapping regions are specifically managed by coordinating the mask designs to ensure compatible feature definitions in those areas.
Solution Approach 2:
The patent includes measurement structures and alignment marks that are designed to detect and prevent feature conflicts before they occur. By measuring the alignment and positioning of features across multiple masks, the system can identify potential conflicts and adjust the mask designs or exposure parameters to eliminate inconsistencies, ensuring reliable feature formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the fabrication of larger integrated circuits by allowing multiple masks to expose a single photoresist, ensuring correct alignment and preventing feature conflicts, thus overcoming the size limitations of individual masks and enhancing manufacturing efficiency.
Implementation Method 1
The photoresist includes one or more components that undergo a chemical transition when exposed to radiation
Data Source
AI summary
Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.