Multiple Artificial Neural Networks in Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory systems require multiple systems to operate multiple artificial neural networks (ANNs), which increases costs and time, as they cannot perform multiple ANN operations concurrently within a single system.
Innovation Solution
Implementing multiple ANNs within a single memory system, where each ANN is configured using complimentary metal-oxide-semiconductor (CMOS) logic blocks under an array of memory cells, allowing concurrent operation of multiple ANNs within the same memory system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple memory systems are used to operate multiple ANNs, then each ANN can be operated independently, but the cost and time increase due to inability to perform concurrent operations
Solution Approach 1:
The patent merges multiple ANN operations into a single memory system by implementing a shared architecture where multiple ANNs can be configured and operated concurrently within the same physical memory device, eliminating the need for separate memory systems for each ANN while maintaining independent operation capabilities through logical separation of memory regions
Solution Approach 2:
The memory system is designed with universal functionality to support multiple different ANN configurations simultaneously. The same memory device can be dynamically reconfigured to host different ANN architectures (e.g., convolutional neural networks, recurrent neural networks) with varying parameters, weights, and biases, allowing one system to perform multiple specialized functions
2Reliability
If multiple memory systems are deployed to run multiple ANNs, then each system can be optimized for its specific ANN, but the overall system cost and resource requirements increase
Solution Approach 1:
Multiple ANN-specific memory systems are merged into a single unified memory device that can host multiple ANNs concurrently. The patent implements separate memory regions within the same physical device for storing weights, biases, and activation values of different ANNs, reducing the total quantity of memory hardware required while maintaining ANN-specific optimization through dedicated logical partitions
Solution Approach 2:
The unified memory system is segmented into multiple independent regions, each capable of being configured for a specific ANN. This segmentation allows each ANN to have its own dedicated storage space for parameters and computations while sharing the underlying physical infrastructure, thereby reducing resource duplication while preserving specialization benefits
3Quantity of substance
If a single memory system is used for multiple ANNs, then resource requirements and costs decrease, but the ability to perform concurrent operations may be compromised
Solution Approach 1:
The patent transitions from a single-dimension sequential operation model to a multi-dimensional concurrent operation model within the same memory system. By utilizing different memory regions, address spaces, and operational modes simultaneously, the system enables multiple ANNs to operate in parallel without interfering with each other, effectively adding temporal and spatial dimensions to the resource utilization
4Reliability
If multiple memory systems are used for multiple ANNs, then operational reliability is maintained, but the time required to deploy and manage multiple systems increases
Solution Approach 1:
The patent combines multiple ANN deployment operations into a single memory system initialization process. By configuring multiple ANNs within one memory device using a unified control interface and shared resource management, the system reduces the cumulative deployment time and management overhead associated with provisioning, configuring, and maintaining separate memory systems for each ANN
Data Source
AI summary
Systems, apparatuses, and methods related to multiple artificial neural networks (ANNs) in memory. Such ANNs can be implemented within a memory system (including a number of memory devices) at different granularities. For example, multiple ANNs can be implemented within a single memory device and/or a single ANN can be implemented over multiple memory devices (such that multiple memory devices are configured as a single ANN). The memory system having multiple ANNs can operate each ANN independently from each other such that multiple ANN operations can be concurrently performed.