Multiple-Output TDC Using Single-Bit DAC Noise Shaping

Solution Overview

Problem

High-precision Digital to Analog Converters (DACs) required for multi-bit feedback loops in time-to-digital converter systems are expensive and power-intensive due to the need for high linearity, which becomes increasingly difficult with higher bit numbers, especially in sub-100 nm technology nodes.

Innovation Solution

A system incorporating a time-to-digital converter (TDC) with a single-bit DAC and an asynchronous delta-sigma modulator, where the TDC generates a multilevel discrete time and discrete amplitude signal and a binary discrete time signal, allowing for noise shaping and reducing the need for high-precision DACs by using a single-bit DAC in a feedback path.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a multi-bit feedback loop is used with a high-precision TDC, then measurement precision is improved, but the DAC becomes expensive and power-intensive due to high linearity requirements

Engineering Contradiction:

ImproveTDC measurement precisionVSAvoidDAC power consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent segments the multi-bit conversion task into multiple single-bit conversions by using an asynchronous delta-sigma modulator that processes the analog input through a single-bit quantizer. This breaks down the complex multi-bit DAC requirement into simpler single-bit operations, reducing the power consumption and complexity of the DAC while maintaining overall measurement precision through the modulator's noise shaping capabilities.

Inventive Principle:

Principle #1Segmentation

2Measurement precision

If a multi-bit feedback loop is used with a high-precision TDC, then measurement precision is improved, but device complexity and area increase due to high-precision DAC requirements

Engineering Contradiction:

ImproveTDC measurement precisionVSAvoidDAC complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the multi-bit conversion task into multiple single-bit conversions by using an asynchronous delta-sigma modulator that processes the analog input through a single-bit quantizer. This breaks down the complex multi-bit DAC requirement into simpler single-bit operations, reducing the power consumption and complexity of the DAC while maintaining overall measurement precision through the modulator's noise shaping capabilities.

Inventive Principle:

Principle #1Segmentation

3Speed

If technology scaling is applied to improve digital speed, then speed is improved, but analog circuit performance degrades due to voltage scaling and increased variability

Engineering Contradiction:

ImproveDigital speedVSAvoidAnalog circuit robustness

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent substitutes analog circuitry with digital circuitry by using an asynchronous delta-sigma modulator that converts the analog input signal into a digital bit stream through a single-bit quantizer. This replacement leverages the robustness of digital circuits against variability and scaling effects while maintaining high-speed performance, as digital logic is less sensitive to voltage scaling and process variations compared to analog circuits.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS7629916B2Multiple output time-to-digital converter

Publication Date: 2009.12.08 INFINEON TECHNOLOGIES AG

AI summary

A multiple output time-to-digital converter (TDC) and an Analog-to-Digital Converter (ADC) incorporating the multiple output TDC is disclosed.