Multiple Plate Line Architecture for Multideck Memory Arrays
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Solution Overview
Problem
The physical limitations of plate line and access line routing in memory devices hinder the increase of memory cell density, read/write speeds, reliability, data retention, and reduce manufacturing costs in multideck memory arrays.
Innovation Solution
The implementation of a multiple plate line architecture for multideck memory arrays, which includes ferroelectric memory cells with three access lines (plate line, digit line, and word line) and efficient area utilization schemes such as on-pitch via structures, allows for the placement of support circuitry components both under and outside the array, facilitating efficient plate line routing and access operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single plate line architecture is used in multideck memory arrays, then the routing complexity is reduced, but the memory cell density and access speed are limited
Solution Approach 1:
The patent divides the plate line system into multiple independent plate lines (first plate line and second plate line) that can be independently controlled and routed. This segmentation allows each plate line to serve specific memory decks, enabling more efficient routing and higher cell density without overwhelming complexity
Solution Approach 2:
The patent transitions from a two-dimensional single plate line routing to a three-dimensional multideck architecture with multiple plate lines extending in vertical and horizontal dimensions. This dimensional expansion allows memory cells to be accessed from multiple decks simultaneously, increasing density while maintaining manageable routing through spatial distribution
2Productivity
If more plate lines are added to increase memory cell density, then the memory cell density improves, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges multiple memory decks into a unified multideck structure where first and second plate lines work together with digit lines and word lines to access memory cells across decks. This merging allows shared routing resources and coordinated operation, achieving high density while controlling complexity through integrated design
Solution Approach 2:
The plate lines are designed to serve multiple functions: they can independently access different memory decks, work in combination with digit lines for selective cell access, and support both read and write operations. This multi-functionality reduces the need for separate dedicated lines for each function, controlling overall complexity
3Ease of manufacture
If traditional access line routing is used, then the manufacturing process is simpler, but the read/write speeds and data retention are reduced
Solution Approach 1:
The patent implements dynamic control of multiple plate lines through coordinated activation with digit lines and word lines. The system can dynamically select which plate line to activate based on the target memory deck, enabling fast access to specific decks while maintaining the ability to access multiple decks sequentially or in parallel, improving speed without requiring permanently active complex routing
Data Source
AI summary
Methods, systems, and devices for multiple plate line architecture for multideck memory arrays are described. A memory device may include two or more three-dimensional arrays of ferroelectric memory cells overlying a substrate layer that includes various components of support circuitry, such as decoders and sense amplifiers. Each memory cell of the array may have a ferroelectric container and a selector device. Multiple plate lines or other access lines may be routed through the various decks of the device to support access to memory cells within those decks. Plate lines or other access lines may be coupled between support circuitry and memory cells through on pitch via (OPV) structures. OPV structures may include selector devices to provide an additional degree of freedom in multideck selectivity. Various number of plate lines and access lines may be employed to accommodate different configurations and orientations of the ferroelectric containers.