Multiple Port Memory Bank Segmentation for Concurrent Access
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Solution Overview
Problem
Conventional memory devices can only perform a single memory operation per clock cycle, leading to delayed read operations during write cycles, which is inefficient in networking and switching applications that require simultaneous read and write operations.
Innovation Solution
A memory device with multiple content and parity memory banks, where the memory control device services multiple requests by writing new content data to a different content memory bank and updating parity data in corresponding parity banks, allowing up to four memory requests to be serviced in a single clock cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional memory devices perform single memory operation per clock cycle, then device complexity is reduced, but productivity deteriorates due to delayed read operations during write cycles
Solution Approach 1:
The memory device is divided into multiple content memory banks (first content memory bank, second content memory bank) and parity memory banks. This segmentation allows different memory operations to be performed in parallel across different banks, enabling multiple read and write operations to occur simultaneously in a single clock cycle, thereby resolving the contradiction between productivity and device complexity.
Solution Approach 2:
The patent introduces a new dimension by adding parity memory banks that store parity data for reconstructing content data. This additional dimension enables read operations to access data from parity banks instead of blocking for write operations in the same bank, allowing concurrent operations and improving throughput without requiring complex multi-port memory structures.
2Productivity
If multiple read requests are serviced in a single clock cycle by using parity data to reconstruct data, then productivity improves, but device complexity increases due to additional parity memory banks and control logic
Solution Approach 1:
Parity memory banks serve as intermediary structures that store parity data generated from content data. When multiple read requests need to be serviced concurrently, the parity data in these intermediary banks enables reconstruction of content data without direct access to the content memory banks, allowing parallel operations while managing complexity through a systematic parity storage approach.
Solution Approach 2:
The parity memory banks serve multiple functions: storing parity data for error detection, providing data for reconstruction during concurrent read operations, and enabling read operations to proceed without blocking write operations. This multi-functionality improves productivity while the structured approach to parity storage manages the added complexity.
3Reliability
If write operations require several clock cycles to complete, then data integrity is maintained, but productivity deteriorates due to delayed read operations
Solution Approach 1:
By segmenting memory operations across different banks, the system can perform write operations in one content memory bank while simultaneously performing read operations in another content memory bank or in parity memory banks. This segmentation maintains data integrity through proper write sequencing while improving productivity by allowing non-blocking read operations to proceed concurrently.
Solution Approach 2:
The system performs preliminary actions by pre-establishing parity data in parity memory banks before write operations complete. This allows read operations to access reconstructed data from parity banks during write cycles, maintaining data integrity while enabling concurrent read operations that would otherwise be blocked.
Data Source
AI summary
A memory device includes content banks configured to store content data and parity banks configured to store parity data for reconstructing the content data. In response to receiving, in a first clock cycle, a first request requesting a first operation to be performed in a first content bank and a second request requesting to write new content data to the first content bank, the memory device performs the first operation in the first content bank, and writes the new content data to a second content bank. The second content bank is selected from a subset of content banks defined by content banks that correspond with parity banks different from parity banks that correspond with the first content bank. The memory device updates, based on the new content data written to the second content bank, parity data in the parity banks that correspond with the second content bank.