Multiple Spacer Patterning for Nanostructure Profile Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor manufacturing is achieving precise dimension control during multiple patterning processes, particularly at the nano-scale, as existing methods often result in defects such as footing structures, corner rounding, and inaccurate pitch dimensions, leading to device failure.
Innovation Solution
The method involves using a multiple spacer patterning process with a doped silicon spacer layer, where a first mandrel layer is formed on a substrate, followed by conformal deposition and selective removal of spacer layers to achieve precise profile control and feature transfer integrity, utilizing a flowable chemical vapor deposition chamber and etching processes to form nanostructures with dimensions less than 14 nanometers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional lithography and double patterning are used to enhance feature density, then the number of features produced is doubled, but profile control deteriorates resulting in defects such as footing structures, corner rounding, and poor line integrity
Solution Approach 1:
A mandrel layer is introduced as an intermediary structure between the substrate and the final feature pattern. The mandrel serves as a temporary support that enables precise spacer formation, and is subsequently removed to leave behind well-defined features without the profile defects associated with conventional double patterning
Solution Approach 2:
The patterning process is segmented into distinct stages: mandrel formation, first spacer deposition, mandrel removal, and second spacer deposition. This segmentation allows each step to be optimized independently, maintaining profile control while achieving high feature density
2Measurement precision
If multiple patterning techniques are used to push dimension limits under 10 nm, then resolution is improved, but process complexity increases making accurate formation increasingly difficult to satisfy
Solution Approach 1:
The mandrel layer is formed in advance with precise dimensional control before spacer deposition. This preliminary structuring establishes a reliable template that guides subsequent spacer formation, simplifying the overall process while achieving sub-10nm resolution
Solution Approach 2:
The patent utilizes controlled deposition parameters and selective removal conditions to achieve precise feature formation. By carefully adjusting deposition thickness, temperature, and chemical selectivity, accurate nanostructure formation is achieved without requiring overly complex process sequences
3Length of moving object
If spacer layers are conformally formed on mandrel structures, then feature pitch is reduced, but selective removal becomes challenging to achieve without affecting surrounding structures
Solution Approach 1:
Different materials are used for the mandrel layer and spacer layers, creating local compositional differences that enable selective removal. The mandrel material is specifically chosen to be removable under conditions that do not affect the spacer structures, facilitating clean pattern transfer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of nanostructures with improved profile control and feature transfer integrity, reducing defects and enhancing the accuracy of small critical dimensional structures, thereby improving the reliability of semiconductor devices.
Implementation Method 1
utilizing a flowable chemical vapor deposition chamber and etching processes to form nanostructures
Implementation Method 2
utilizing a flowable chemical vapor deposition chamber and etching processes to form nanostructures
Data Source
AI summary
The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.