Multiplexed Data Stream Circuit Architecture for QoS

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Solution Overview

Problem

Ethernet protocols face challenges in providing guaranteed Quality of Service (QoS) for time division multiplexed (TDM) networks, particularly in meeting stringent jitter and data loss requirements, which limits their implementation in networks like the public switched telephone network (PSTN).

Innovation Solution

The implementation of an apparatus with an ingress controller and separate switching fabrics for high and low priority data streams, using an overlay synchronous timeslot scheme to multiplex data streams, allowing high priority data to be transported deterministically without buffering and efficiently using bandwidth by reusing idle timeslots for low priority data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Ethernet packets are transported through the network with resource arbitration and buffers at nodes, then data loss and jitter are reduced, but network complexity increases and delay increases

Engineering Contradiction:
ImproveQoS guaranteeVSAvoidnetwork complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The network traffic is segmented into two distinct priority levels: high priority traffic and low priority traffic. High priority traffic receives guaranteed bandwidth and deterministic service, while low priority traffic uses available bandwidth when high priority traffic is not utilizing its allocated resources. This segmentation resolves the contradiction by providing QoS guarantees for critical traffic without requiring complex arbitration mechanisms for all traffic types.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different quality of service characteristics are applied to different parts of the traffic flow based on their priority. High priority traffic experiences deterministic latency and guaranteed bandwidth, while low priority traffic experiences best-effort service. This local differentiation of service quality allows the network to meet stringent QoS requirements for specific applications without imposing complexity on the entire network infrastructure.

Inventive Principle:
Principle #3Local quality

2Reliability

If resource arbitration and buffers are implemented at nodes, then jitter is reduced, but delay increases

Engineering Contradiction:
Improvejitter controlVSAvoidnetwork delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Bandwidth allocation and priority assignments are predetermined through configuration before traffic enters the network. High priority traffic is pre-assigned guaranteed bandwidth and specific transmission slots, eliminating the need for real-time arbitration and buffering delays. This preliminary setup of resource allocation allows deterministic jitter control without introducing additional delay from dynamic resource management.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If Ethernet is used for data distribution, then flexibility and scalability are improved, but QoS guarantee for TDM networks deteriorates

Engineering Contradiction:
ImproveEthernet flexibilityVSAvoidQoS guarantee
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system dynamically multiplexes high priority and low priority traffic within the same Ethernet infrastructure. High priority traffic is transmitted in designated time slots with guaranteed bandwidth, while low priority traffic utilizes remaining capacity. This dynamic resource allocation allows Ethernet to maintain its flexibility and scalability while providing deterministic QoS guarantees for TDM-like applications through priority-based traffic management.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2127167B1Multiplexed data stream circuit architecture
Publication Date: 2016.03.23 HUAWEI TECH CO LTD
  • EP2127167B1 patent drawingFigure 1~2B
  • EP2127167B1 patent drawingFigure 3
  • EP2127167B1 patent drawingFigure 4~6

AI summary

An apparatus comprising an ingress controller configured to receive a data frame comprising a high priority data and a low priority data, and an ingress buffer coupled to the ingress controller and configured to buffer the low priority data, wherein the high priority data is not buffered. Also disclosed is a network component, comprising an ingress controller configured to receive a data stream comprising high priority data and low priority data, and an ingress buffer coupled to the ingress controller and configured to receive, buffer, and send the low priority data, and further configured to receive a flow control indication, wherein the ingress buffer varies an amount of the low priority data sent from the ingress buffer in accordance with the flow control indication.