Multiplexed Neural Core Circuit for Neuromorphic Power Optimization
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Solution Overview
Problem
Current neuromorphic and synaptronic computation systems lack efficient methods to manage and integrate neuronal attributes for multiple neurons, limiting their ability to simulate biological brain functions effectively.
Innovation Solution
A multiplexed neural core circuit with a memory device that maintains neuronal attributes for multiple neurons, using a controller to retrieve and integrate firing events based on synaptic connectivity, neuron parameters, and routing data to generate firing events, enabling efficient computation and control logic for multiple neurons.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional digital models are used to simulate neurons, then computational precision is maintained, but power consumption and area increase significantly
Solution Approach 1:
The patent replaces traditional digital computational systems with a neuromorphic system that uses continuous analog signals and event-driven processing. Instead of using digital circuits to simulate neuronal behavior, the invention employs specialized neural cores with continuous-time integrators and event-based spike processing, thereby reducing power consumption while maintaining biological fidelity
Solution Approach 2:
The invention changes the operational parameters from discrete digital values to continuous analog signals. Neuronal membrane potentials are represented as continuous voltage levels rather than digital numbers, and synaptic weights are stored as analog conductance values in crossbar arrays, enabling more energy-efficient computation
2Area of stationary object
If separate processing elements are used for each neuron, then processing speed is maintained, but area increases significantly
Solution Approach 1:
The patent merges multiple neuron processing functions into a single integrated neural core. Instead of having separate processing elements for each neuron, the invention combines spike integration, threshold comparison, and output generation into unified circuits that handle multiple neurons simultaneously through shared resources and time-multiplexed operations
Solution Approach 2:
The neural core circuits are designed with universal components that can serve multiple functions. The same integration circuitry processes spikes from multiple input synapses, the same threshold mechanism determines firing for different neurons, and shared memory structures store synaptic weights for multiple neuron connections, thereby reducing overall chip area
3Reliability
If full synaptic connectivity is implemented, then biological accuracy is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent segments the neural network into modular neural cores, each handling a specific subset of neurons and their connections. This segmentation allows complex fully-connected networks to be implemented as multiple manageable modules, reducing the complexity of individual circuits while maintaining overall biological accuracy through the aggregate connectivity of all modules
Data Source
AI summary
Embodiments of the invention relate to a multiplexed neural core circuit. One embodiment comprises a core circuit including a memory device that maintains neuronal attributes for multiple neurons. The memory device has multiple entries. Each entry maintains neuronal attributes for a corresponding neuron. The core circuit further comprises a controller for managing the memory device. In response to neuronal firing events targeting one of said neurons, the controller retrieves neuronal attributes for the target neuron from a corresponding entry of the memory device, and integrates said firing events based on the retrieved neuronal attributes to generate a firing event for the target neuron.