Multiplexed Oxide Semiconductor Structure for Uniform Transistor Measurement
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving small variations in electrical characteristics, high reliability, low power consumption, and high on-state current while being miniaturized or highly integrated.
Innovation Solution
A semiconductor device is designed with a structure that includes multiplexers, analog switches, and transistors, where the transistors have a metal oxide channel formation region containing indium, gallium, and zinc, and the analog switches include CMOS circuits with silicon in the channel formation region, allowing for efficient electrical connections and microwave treatment to reduce oxygen vacancies and hydrogen concentrations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor devices are miniaturized or highly integrated, then productivity and device density are improved, but variations in electrical characteristics and reliability deteriorate
Solution Approach 1:
The patent changes the material parameter from conventional silicon-based semiconductors to oxide semiconductors (such as In-Ga-Zn-O), which fundamentally alters the electrical characteristics to achieve low off-state current and reduced variations, enabling high-density integration with improved reliability
Solution Approach 2:
The patent employs composite material structures including oxide semiconductor layers combined with specific gate insulator materials and metal layers, creating a multi-material system that optimizes both electrical performance and manufacturing scalability for high-density devices
2Use of energy by moving object
If oxide semiconductor transistors are used, then power consumption is reduced due to low leakage current, but manufacturing precision and electrical characteristic consistency worsen
Solution Approach 1:
The patent optimizes the composition parameters of the oxide semiconductor (specific ratios of In, Ga, Zn, and O) and controls deposition parameters to achieve consistent electrical characteristics across manufactured devices while maintaining the low power consumption benefits of oxide semiconductors
Solution Approach 2:
The patent performs preliminary formation of the oxide semiconductor layer with controlled composition and structure before subsequent processing steps, ensuring that the material is pre-configured to deliver consistent electrical characteristics and low leakage current throughout manufacturing
3Manufacturing precision
If conventional semiconductor materials are used, then manufacturing precision is maintained, but power consumption increases due to higher leakage current
Solution Approach 1:
The patent fundamentally changes the semiconductor material parameter from conventional silicon to oxide semiconductor compounds, which inherently provides lower leakage current and reduced power consumption while maintaining manufacturing feasibility through controlled deposition processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables a semiconductor device with small variations in transistor characteristics, high reliability, favorable electrical properties, and low power consumption, facilitating miniaturization and high integration.
Implementation Method 1
microwave treatment to reduce oxygen vacancies and hydrogen concentrations
Implementation Method 2
microwave treatment to reduce oxygen vacancies and hydrogen concentrations
Data Source
AI summary
A semiconductor device that can be subjected to multipoint measurement is provided. The semiconductor device includes a first layer and a second layer over the first layer. The first layer includes a first multiplexer, a second multiplexer, m (m is an integer of 1 or more) analog switches electrically connected to the first multiplexer, and n (n is an integer of 1 or more) analog switches electrically connected to the second multiplexer. The second layer includes m×n transistors. Each of the m analog switches is electrically connected to n transistors, and each of the n analog switches is electrically connected to m transistors.