Multiplexed Variable Gain Amplifier for Low-Distortion Gain Switching
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Solution Overview
Problem
High-speed variable gain amplifiers require fast bipolar transistors to meet bandwidth and linearity requirements, but CMOS switches cannot be directly connected to high-impedance amplifier input terminals due to voltage limitations, and using them to switch low impedance components can distort frequency response due to non-linear resistance and capacitance.
Innovation Solution
A high-speed BiCMOS digitally variable gain amplifier is designed with a front-end amplification stage comprising parallel high and low gain pre-amplifiers, a level shifter stage, and an output amplifier stage, where coarse and fine gain control mechanisms are implemented by enabling one pre-amplifier at a time and using step attenuators, while maintaining safe transistor operating points to prevent voltage drift and non-ideal loading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If CMOS switches are used to switch gain-setting resistors, then gain control is achieved, but frequency response is distorted due to non-linear resistance and capacitance
Solution Approach 1:
The patent introduces an intermediary switched capacitor network between the CMOS switches and the gain-setting resistors. This intermediary element buffers the non-linear effects of the CMOS switches, allowing gain control functionality while preventing frequency response distortion from propagating to the signal path.
Solution Approach 2:
The patent extracts the switching function from direct contact with the gain-setting resistors by placing it in a separate switched capacitor network. This separation isolates the non-linear characteristics of the switches from the critical signal path, allowing independent optimization of each function.
2Ease of operation
If CMOS switches are connected directly to high-impedance amplifier input terminals, then switching function is achieved, but voltage limitations prevent proper operation
Solution Approach 1:
The patent employs an intermediary buffer stage between the CMOS switches and the high-impedance amplifier input terminals. This buffer acts as a voltage translator and impedance matcher, enabling the switches to operate at lower voltages while safely driving the high-impedance inputs without voltage compatibility issues.
3Speed
If fast bipolar transistors are used, then bandwidth and linearity requirements are met, but transistor operating points become unstable leading to voltage drift
Solution Approach 1:
The patent implements feedback mechanisms through the switched capacitor networks and attenuator stages that continuously monitor and adjust transistor operating points. This feedback stabilizes the operating conditions of fast bipolar transistors, preventing voltage drift while maintaining high bandwidth and linearity performance.
Data Source
AI summary
A digitally variable gain amplifier comprising a front-end stage, a level shifter stage, and an output amplifier stage. The front-end stage comprises a high gain pre-amplifier and a low gain pre-amplifier driven in parallel by a differential input signal. A coarse gain control is realized by enabling only one pre-amplifiers at a time, while the differential input signal remains connected to the inputs of the disabled pre-amplifier. An attenuator following each pre-amplifier provides fine gain control. The enabled pre-amplifier amplifies the differential input signal and outputs a first dc voltage level. The disabled pre-amplifier is placed into a standby ready mode and outputs a second dc voltage level that is greater in magnitude than the first dc voltage level. The level shifter stage performs a minimum voltage selection operation to automatically select and level shift the amplified differential input signal, and further pass the signal to the output amplifier stage.


