Multi-Channel Multiplexer Buffering for Low-Leakage Sensor Signals

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Solution Overview

Problem

In multiplexer systems, leakage current through disabled channels can distort sensor signals due to high output impedance of sensors, as even small leakage currents can generate significant voltages across disabled channels, altering the intended signal processed by the system.

Innovation Solution

Incorporating multiple metal oxide semiconductor field effect transistors (MOS transistors) with a bulk biasing circuit and a buffer to reduce leakage current, where the buffer couples the internal node of disabled channels to the output voltage level, minimizing the drain-to-source potential difference and thus reducing leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If sensors with high output impedance are used in multiplexer channels, then sensor sensitivity and measurement capability are improved, but leakage current through disabled channels generates significant voltage distortion

Engineering Contradiction:
Improvesensor signal accuracyVSAvoidleakage current voltage distortion
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

A bulk biasing circuit is introduced as an intermediary component between the sensor and the multiplexer channel. This circuit actively compensates for leakage current by injecting an equal and opposite current, thereby eliminating the net leakage effect that causes voltage distortion. The bulk biasing circuit acts as a mediator that cancels the harmful leakage current generated by the high-impedance sensor channel when disabled.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If standard transistors are used in multiplexer switch assemblies, then device complexity is reduced, but leakage current through disabled channels increases

Engineering Contradiction:
Improvetransistor structure simplicityVSAvoidleakage current
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent modifies the electrical parameters of the transistor by introducing a bulk biasing voltage. By changing the bulk potential of the MOSFET transistor, the leakage current characteristics are significantly improved. This parameter change (applying bulk bias voltage) reduces the subthreshold leakage and junction leakage in disabled channels without requiring a complete redesign of the transistor structure, thus maintaining relative simplicity while reducing leakage.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Significantly reduces leakage current through disabled channels, preventing signal distortion and ensuring accurate signal processing by maintaining a near-zero voltage difference across MOS transistors when channels are off, even with high output impedance sensors.

Implementation Method 1

The bulk biasing circuit is configured to bias the bulk of the first transistor at a first bias voltage responsive to a voltage on the input node being above a first voltage level, and to bias the bulk of the first transistor at a second bias voltage responsive to the voltage on the input node being below a second voltage level

Methodology Applied
Scientific EffectBulk biasing:

Implementation Method 2

the buffer couples the internal node of disabled channels to the output voltage level, minimizing the drain-to-source potential difference and thus reducing leakage current

Methodology Applied
Scientific EffectBuffer coupling:

Data Source

PatentUS10917090B1Multi-channel multiplexer
Publication Date: 2021.02.09 TEXAS INSTRUMENTS INC
  • US10917090B1 patent drawing
  • US10917090B1 patent drawing
  • US10917090B1 patent drawing

AI summary

A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.