Multiplexer Data Reordering for Masked Buffer Writes
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Solution Overview
Problem
Traditional memory architectures are unable to seamlessly write data to a memory device used as a buffer while masking certain data that is not intended to be written, maintaining a predetermined order such as FIFO.
Innovation Solution
The use of multiplexers to group and reorder data words and mask bits, allowing only unmasked data to be written to the memory array, thereby enabling efficient data masking and ordering during the writing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional memory architectures are used to write data to a buffer, then data can be stored in predetermined order (FIFO), but masked data cannot be seamlessly ignored while maintaining the predetermined write order
Solution Approach 1:
A sequencer circuit is introduced as an intermediary component between the data input and the memory array. The sequencer receives data words and associated mask bits, determines which data words should be written based on the mask bits and write pointer status, and controls the writing process accordingly. This intermediary handles the complexity of masking logic separately from the core memory structure, allowing traditional memory architectures to gain masking capability without fundamental redesign.
Solution Approach 2:
The writing process is segmented into distinct controllable stages: data reception, mask bit evaluation, write pointer status checking, and selective writing. The sequencer divides the data stream into individual data words, each evaluated against its corresponding mask bit and the current write pointer state. This segmentation allows precise control over which data words are written while maintaining FIFO order for unmasked data.
2Reliability
If masked data is written to memory using traditional architectures, then data can be stored, but the predetermined FIFO order cannot be maintained when skipping masked data
Solution Approach 1:
The patent replaces complex mechanical or hardware-based selective writing mechanisms with a sequence-controlled logic system. Instead of using separate physical paths for masked and unmasked data, the sequencer uses control signals and logic circuits to determine writing behavior. The write pointer and mask bit comparison logic substitute for more complex hardware switching mechanisms, maintaining FIFO order through logical control rather than physical data path separation.
3Ease of operation
If all data words are written to the memory array, then writing is simple, but masked data that should be ignored cannot be selectively excluded
Solution Approach 1:
The sequencer implements feedback mechanisms where the write pointer status is continuously monitored and fed back into the writing decision logic. The mask bits associated with each data word provide feedback information that determines whether that data word should be written. This feedback loop allows the system to automatically exclude masked data while maintaining simple operation for unmasked data, as the writing process is controlled by the interaction between write pointer state and mask bit values.
Data Source
AI summary
Disclosed are apparatuses and methods for writing data to a memory array of a buffer. One such apparatus may include a multiplexer that receives data words and a data mask. The multiplexer may change the order of the data words to group masked data words together and to group unmasked data words together. The multiplexer may also change the order of the data mask to group masking bits together and to group unmasking bits together. The apparatus may use the data words with the changed order and the data mask with the changed order to write data to the memory array.