Multiplexer Tree Gray-Code Sequencing for Lower Dynamic Power

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Solution Overview

Problem

The high dynamic power consumption in multiplexer tree structures, particularly in low-power integrated circuit systems, is a significant issue due to frequent toggling activities, which is pronounced in portable electronic devices with limited battery capacity.

Innovation Solution

Employing a non-linear Gray code address sequence that reduces bit transition counts, with optimized Gray code sequences minimizing transistor switching and dynamic power consumption by ensuring that levels with more multiplexers toggle less frequently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a linear incremental address sequence is used to control the multiplexer tree, then the sequential access to storage units is simplified, but the dynamic power consumption increases due to frequent toggling activities

Engineering Contradiction:

Improvesequential access simplicityVSAvoiddynamic power consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent changes the address sequence parameter from linear incremental to Gray code sequence. This parameter change reduces the number of bit transitions in the select signals to the multiplexer tree, thereby reducing toggling activities and dynamic power consumption while maintaining sequential access functionality

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

Instead of using the conventional linear address sequence that increments by 1, the patent inverts the approach by using a Gray code sequence where only one bit changes between consecutive addresses. This inversion of the address sequencing method reduces switching activity in the multiplexer tree

Inventive Principle:

Principle #13The other way round (Inversion)

2Adaptability or versatility

If the multiplexer tree is used to select from a large number of inputs, then the routing capability is enhanced, but the dynamic power dissipation becomes significant due to accumulatively increasing toggling activities

Engineering Contradiction:

Improverouting capabilityVSAvoiddynamic power dissipation

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies Gray code encoding to the address sequence parameter, which fundamentally changes the transition pattern from linear to single-bit-changing. This reduces the cumulative toggling activities across all multiplexer levels while preserving the full routing capability of the multiplexer tree structure

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the inherent property of Gray code (non-linear sequencing) from a potential complexity into a benefit. The non-linear nature of Gray code, which could be seen as complicating the address sequence, actually reduces switching activity and power dissipation in the multiplexer tree

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS9281817B2Power conservation using gray-coded address sequencing

Publication Date: 2016.03.08 NVIDIA CORP

AI summary

A multiplexer tree operable to control an output a sequence of data stored in a plurality of storage units in accordance with a non-linear address sequence that has less bit transition counts than a linear address sequence. The non-linear address sequence is provided to the selection inputs of the multiplexer tree and causes the levels having greater numbers of multiplexers to toggle less frequently than the levels having smaller numbers of multiplexers. The non-linear address sequence may comprise a Gray code sequence where every two adjacent addresses differ by a single bit. The non-linear address sequence may be optimized to minimize transistor switching in the multiplexer tree.