Multiplexer Inductance Element Parasitic Capacitance Reduction

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Solution Overview

Problem

Existing multiplexers with inductance elements on mounting substrates face precision issues in impedance matching due to parasitic capacitance, which affects the accuracy of impedance adjustment and overall performance.

Innovation Solution

A multiplexer configuration with a multilayer mounting substrate and strategically placed inductance elements, where the first inductance element is positioned farther from the substrate's surface and the second inductance element closer, with no ground pattern adjacent to the first inductance element to minimize parasitic capacitance, ensuring accurate impedance matching across filters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an inductance element is incorporated into the mounting substrate, then impedance matching can be achieved, but parasitic capacitance is generated which degrades impedance matching precision

Engineering Contradiction:
Improveimpedance matching precisionVSAvoidparasitic capacitance
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the harmful ground pattern from the vicinity of the inductance element. By deliberately excluding the ground pattern from the formation region of the inductance element, the design removes the source of parasitic capacitance while maintaining the necessary grounding elsewhere in the circuit.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by creating a specialized zone around the inductance element where the ground pattern is excluded. This local modification optimizes the electrical characteristics specifically at the inductance element location without affecting the overall grounding structure of the mounting substrate.

Inventive Principle:
Principle #3Local quality

2Reliability

If a ground pattern is provided adjacent to the inductance element, then grounding is improved, but parasitic capacitance increases and impedance matching precision deteriorates

Engineering Contradiction:
Improvegrounding qualityVSAvoidimpedance matching precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent extracts the ground pattern from the immediate vicinity of the inductance element by defining an exclusion zone. This removal eliminates the parasitic capacitance pathway while the rest of the grounding system remains intact to maintain overall circuit reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements local quality differentiation by creating a ground-free zone specifically around the inductance element. This localized modification optimizes the electrical performance at the critical inductance location without compromising the overall grounding architecture.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If inductance elements are placed on the mounting substrate, then impedance adjustment is enabled, but arrangement precision is affected by substrate layout constraints

Engineering Contradiction:
Improveimpedance adjustment capabilityVSAvoidarrangement precision
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The patent applies local quality by defining a specific formation region for the inductance element with excluded ground patterns. This localized design freedom allows precise control of the inductance element's electrical characteristics independent of the overall substrate layout constraints.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent addresses layout constraints by utilizing the three-dimensional wiring layer structure. By defining the inductance element formation region in relation to wiring layers at different heights, the design achieves precise impedance adjustment while navigating around planar layout limitations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration achieves precise impedance matching and improved attenuation both within and outside the pass band, enhancing the multiplexer's performance by reducing parasitic capacitance and unnecessary coupling.

Implementation Method 1

a first inductance element which is included in the mounting substrate, and one end of which is connected to one end of the first elastic wave filter. The other end of the first inductance element and one end of each of the one or more second elastic wave filters are connected to each other

Methodology Applied
Scientific EffectInductance: Inductor

Implementation Method 2

a plurality of band pass filters defining the multiplexer, elastic wave filters exhibiting low loss within the pass band and steepness of the bandpass characteristics in the peripheries of the pass band are used

Methodology Applied
Scientific EffectElastic wave filtering: Filter (electronic)

Implementation Method 3

The first elastic wave filter includes one or more first resonators defining a signal path connecting the one end and the other end of the first elastic wave filter

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS10601402B2Multiplexer, transmission device, and reception device
Publication Date: 2020.03.24 MURATA MFG CO LTD
  • US10601402B2 patent drawing
  • US10601402B2 patent drawing
  • US10601402B2 patent drawing

AI summary

A multiplexer includes filters on one principal surface of a mounting substrate and having mutually different frequency bands, and an inductance element which is incorporated in the mounting substrate and one end of which is connected to one end of the filter. The other end of the inductance element and one end of each of the filters, are connected to each other at a common connection point. The inductance element is defined by spiral wiring conductors disposed in first and second wiring layers provided in an inner layer of the mounting substrate. The mounting substrate includes third and fourth wiring layers which are adjacent to the first and second wiring layers, and in which no ground pattern is provided in a portion corresponding to a formation region of the inductance element.