Multiplexer Circuit for Selective KVM Connection to Multiple CPUs
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Solution Overview
Problem
Existing computing systems lack flexibility in configuring and using multiple processors as independent nodes while maintaining unified system management.
Innovation Solution
A multi-processor system with first and second central processing units connected by a processor interconnect, managed by a single baseboard management controller, allowing the system to operate as a single unified node or be partitioned into independent nodes, with a multiplexer circuit enabling a single KVM connection to either CPU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single KVM connection is shared between multiple CPUs, then device complexity is reduced, but ease of operation deteriorates because only one CPU can access the KVM connection at a time
Solution Approach 1:
The system dynamically switches the KVM connection between multiple CPUs based on operational needs. The multiplexer circuit allows the single KVM connection to be selectively connected to different CPUs, enabling flexible access while maintaining system complexity reduction. This dynamic allocation resolves the contradiction by making the system adaptable rather than static.
Solution Approach 2:
A multiplexer circuit is introduced as an intermediary component between the single KVM connection and multiple CPUs. This intermediary enables multiple CPUs to access the same KVM connection at different times, reducing the total number of KVM connections required while maintaining operational accessibility for each CPU.
2Adaptability or versatility
If multiple independent computing nodes are created, then adaptability improves, but device complexity increases due to multiple management controllers
Solution Approach 1:
A single baseboard management controller is designed to perform multiple functions across different computing nodes. Rather than having separate management controllers for each node, this universal controller can manage multiple CPUs and partitions, reducing device complexity while maintaining the adaptability needed for different configuration scenarios.
Solution Approach 2:
The system can be segmented into multiple independent computing nodes through virtualization and partitioning mechanisms controlled by a single management controller. This allows the system to achieve configuration flexibility and adaptability for different workloads while avoiding the complexity of multiple physical management controllers.
3Productivity
If processors operate as independent nodes, then productivity improves through parallel processing, but ease of operation worsens due to separate system management
Solution Approach 1:
The single baseboard management controller acts as an intermediary that provides unified system management for multiple independent computing nodes. This allows processors to operate independently for parallel processing while maintaining simplified management through a centralized control point, resolving the contradiction between productivity and ease of operation.
Solution Approach 2:
The system dynamically adjusts its operational mode, allowing processors to function as independent nodes for high productivity while being managed through a single versatile controller. The management controller can adapt its behavior based on whether nodes are operating independently or as a unified system, maintaining ease of operation across different productivity scenarios.
Data Source
AI summary
A multi-processor system includes first and second central processing units (CPUs) connected by a processor interconnect, a single baseboard management controller for managing operation of the first and second CPUs, wherein the first and second CPUs are operable as a single unified node, and a single keyboard, video and mouse connection, wherein the single keyboard, video and mouse connection includes a video controller and a USB controller. The multi-processor system may further comprise a multiplexer connected to the video controller and the USB controller, wherein the multiplexer has a selectable PCIe connection to either the first central processing unit or the second central processing unit. Program instructions may be executable by the baseboard management controller to send a selection signal to the multiplexer.