Multiplexer Passive I/O Expansion Memory Density

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Solution Overview

Problem

As the number of memory dies in multi-die packages increases, the capacitance on data buses in memory devices and solid state drives (SSDs) grows, leading to performance limitations due to increased loading, and existing expander blocks require high power and concurrently connect enabled and disabled memory devices, affecting overall system performance.

Innovation Solution

A multiplexer is used to selectively connect only enabled memory devices to the communication channel, reducing capacitance and power consumption by isolating unused devices and using passive input/output expansion, which is controlled by the same enable signals as the memory packages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of memory dies in multi-die packages is increased to achieve higher memory density, then memory capacity is improved, but capacitance on data buses increases leading to performance degradation

Engineering Contradiction:
Improvememory densityVSAvoidbus performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent divides the memory system into multiple independent groups, where each group can be independently enabled or disabled. This segmentation allows the system to activate only the necessary memory groups, reducing the total capacitance on the data bus while maintaining high memory density capability. The multiplexer selectively connects only the enabled groups to the bus, preventing capacitance accumulation from disabled groups.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic control of memory group connections through enable signals and a multiplexer. The system can dynamically adjust which memory groups are connected to the data bus based on operational needs. This dynamic reconfiguration allows optimization of bus capacitance in real-time, maintaining high performance while supporting high memory density through multi-die packages.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If expander blocks are used to connect multiple memory devices to a communication channel, then I/O expansion is achieved, but power consumption increases and enabled/disabled devices are concurrently connected

Engineering Contradiction:
ImproveI/O expansionVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the active clocking and control elements from the expansion mechanism, replacing them with a passive multiplexer-based approach. By removing the need for active clocking elements in each memory group and using a central multiplexer for selection, the system achieves I/O expansion with significantly reduced power consumption. Only the selected enabled group requires active clocking, not all groups simultaneously.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a multiplexer as an intermediary between the memory groups and the communication channel. This multiplexer acts as a passive selector that connects only the enabled memory group to the bus based on enable signals. This intermediary mechanism enables I/O expansion without requiring active control elements in each group, thereby reducing overall power consumption while preventing concurrent connection of enabled and disabled devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11385949B2Apparatus having a multiplexer for passive input/output expansion
Publication Date: 2022.07.12 MICRON TECHNOLOGY INC
  • US11385949B2 patent drawing
  • US11385949B2 patent drawing
  • US11385949B2 patent drawing

AI summary

Apparatus having a plurality of sets of memory devices and a multiplexer, wherein each set of memory devices of the plurality of sets of memory devices corresponds to a respective enable signal of a plurality of enable signals, wherein, for each set of memory devices of the plurality of sets of memory devices, each memory device of that set of memory devices is configured to receive commands in response to the respective enable signal for that set of memory devices having a particular logic level, and wherein, for each set of memory devices of the plurality of sets of memory devices, the multiplexer is configured to selectively connect input/output signal lines of that set of memory devices to an interface of the apparatus in response to the respective enable signal for that set of memory devices.