Semiconductor Multiplexer Area Reduction via Potential Conversion

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Solution Overview

Problem

The existing multiplexer structures in semiconductor devices require higher power source voltages to ensure proper operation, leading to increased area and power consumption due to the need for larger p-channel transistors and standby currents, especially in high-speed applications.

Innovation Solution

A method for operating a semiconductor device with a selection circuit that uses capacitors to hold potentials higher than the input signals, allowing transistors to turn on or off independently of the input signals, reducing the need for p-channel transistors and minimizing standby current by using wide-gap semiconductor transistors and optimizing capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If n-channel transistors are used in the multiplexer to reduce area, then the area is reduced, but the output signal potential becomes lower than the input signal potential by the threshold voltage

Engineering Contradiction:
Improvemultiplexer areaVSAvoidoutput signal potential level
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

A potential conversion circuit is introduced as an intermediary component between the n-channel transistor multiplexer and the output. This circuit converts the low potential output signal from the multiplexer back to the original high potential level, allowing the use of area-efficient n-channel transistors while maintaining proper signal voltage levels for subsequent circuit operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If p-channel transistors are used in the multiplexer to maintain signal potential, then the signal potential is maintained, but the area increases significantly because p-channel transistors need to be three times larger than n-channel transistors

Engineering Contradiction:
Improvesignal potential levelVSAvoidmultiplexer area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of using large p-channel transistors directly, the invention uses small n-channel transistors in the multiplexer followed by a potential conversion circuit as a mediator. This intermediary circuit restores the signal to the correct potential level without requiring the large transistor area that would be needed if p-channel transistors were used directly.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the voltage parameter of the output signal by introducing a potential conversion circuit. This circuit transforms the output signal from the lower potential level (VDD - Vth) produced by n-channel transistors back to the original high potential level (VDD), enabling proper signal levels without using large p-channel transistors.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If transmission gates are used to suppress potential change in output signal, then the signal integrity is improved, but the area increases due to requiring both p-channel and n-channel transistors for each gate

Engineering Contradiction:
Improveoutput signal stabilityVSAvoidmultiplexer area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The potential conversion circuit serves as an intermediary that corrects the potential level of the output signal without requiring the complex transmission gate structure. This mediator approach achieves signal integrity through a simpler n-channel transistor-based multiplexer combined with potential restoration, rather than using area-intensive transmission gates.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Speed

If higher power source voltage is applied to the SRAM to enable high-speed operation, then the operation speed is improved, but the power consumption increases due to higher standby current

Engineering Contradiction:
Improveoperation speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The invention changes the voltage parameter strategy by separating the SRAM operating voltage from the signal potential requirements. The SRAM can operate at its normal voltage level while the potential conversion circuit handles the voltage level restoration, allowing high-speed operation without proportionally increasing power consumption through elevated supply voltages.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the area and power consumption of the semiconductor device, enabling high-speed operation while minimizing power usage and eliminating the need for SRAM-based inverter circuits.

Implementation Method 1

In the memory, one of a source and a drain of a first transistor is connected to a first capacitor, and one of a source and a drain of a second transistor is connected to a second capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9571099B2Electronic device comprising multiplexer and driving method thereof
Publication Date: 2017.02.14 SEMICON ENERGY LAB CO LTD
  • US9571099B2 patent drawing
  • US9571099B2 patent drawing
  • US9571099B2 patent drawing

AI summary

A method for driving a semiconductor device capable of reducing an area of a multiplexer and reducing its power consumption is provided. In a method for operating a semiconductor device including a memory and a multiplexer, a first transistor is connected to a first capacitor, and a second transistor is connected to a second capacitor. In the multiplexer, in a third transistor, a source is connected to a first input terminal and a drain is connected to an output terminal and, in a fourth transistor, a source is connected to a second input terminal and a drain is connected to the output terminal. Further, a step of holding a first potential in a node to which the first transistor, the first capacitor, and a gate of the third transistor are connected and holding a second potential higher than the first potential in the node is included.