Multiplexer-Based Sub-Core Interconnect for Emulation

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Solution Overview

Problem

The complexity of modern SoC designs and the need for comprehensive system-level verification in hardware emulation is hindered by the impracticality of crossbar switches due to increased wire resistance and cross-talk, particularly in interconnections within a crossbar switch.

Innovation Solution

A multiplexer-based network is used to communicate between programmable sub-cores within a single integrated circuit, where each sub-core is connected through multiplexers for sending data and demultiplexers for receiving data, with a clock for synchronizing communication, reducing dependency on crossbar switches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If crossbar switches are used for interconnections in hardware emulation, then communication between emulator components is facilitated, but wire resistance and cross-talk increase making the system impractical

Engineering Contradiction:
Improvecommunication facilitationVSAvoidwire resistance and cross-talk
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent divides the monolithic crossbar switch into multiple smaller sub-cores, each with its own local multiplexer. This segmentation reduces the size of individual crossbar switches, thereby reducing wire resistance and cross-talk while maintaining the overall communication capability through coordinated operation of multiple sub-cores.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical communication architecture with local multiplexers at the sub-core level and global multiplexers for inter-sub-core communication. This adds a dimensional layer to the communication structure, allowing data to be routed through multiple stages rather than requiring direct long-distance connections, thus reducing the impact of wire resistance and cross-talk.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If crossbar switches are used for interconnections, then communication between components is enabled, but device complexity increases

Engineering Contradiction:
Improvecommunication capabilityVSAvoidcrossbar switch complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent segments the large crossbar switch into multiple smaller sub-cores, each with its own local multiplexer. This reduces the complexity of individual crossbar switches while distributing the overall communication function across multiple simpler units, making the system more manageable and less prone to errors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces local multiplexers as intermediary components between processing elements and the global crossbar switch. These intermediaries simplify the interface between sub-cores and the main communication infrastructure, reducing the complexity of direct connections while maintaining full communication capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If larger wires are used in crossbar switches, then signal transmission is improved, but cross-talk and spacing requirements increase

Engineering Contradiction:
Improvesignal transmissionVSAvoidcross-talk
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent divides the large crossbar switch into multiple smaller sub-cores, which reduces the physical distance and size of wire connections within each sub-core. This segmentation allows for smaller wire sizes to be used while maintaining signal transmission quality, thereby reducing cross-talk and spacing requirements.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8352242B2Communication scheme between programmable sub-cores in an emulation environment
Publication Date: 2013.01.08 SIEMENS INDUSTRY SOFTWARE INC
  • US8352242B2 patent drawing
  • US8352242B2 patent drawing
  • US8352242B2 patent drawing

AI summary

A system and method are disclosed for communicating in a programmable core. The programmable core is within a single integrated circuit and is divided into multiple independent sub-cores. The sub-cores are coupled together using a multiplexer based network. In another aspect, the multiplexer-based network includes multiplexers associated with some of the sub-cores for sending data and demultiplexers associated with other sub-cores for receiving data. In yet another aspect, a clock is included in the multiplexer-based network for synchronizing communication between the multiplexers and demultiplexers.