Multiplexer-Based Tracking Circuit for SRAM Degradation
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Solution Overview
Problem
Tracking circuits in memory devices, such as SRAM, degrade faster than memory array transistors due to frequent activation, leading to increased read access time and timing violations, as they are used for signal development every time the memory array is read, causing transistor degradation.
Innovation Solution
Implementing a multiplexer to selectively activate one of multiple tracking circuits based on the least significant bits of the row address, reducing the number of times each tracking circuit is accessed, thereby reducing degradation by a factor of 2N on average.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If tracking circuits are activated every time the memory array is read, then signal development time can be accurately measured, but transistor degradation increases leading to timing violations
Solution Approach 1:
The patent divides the single tracking circuit into multiple tracking circuits (first tracking circuit, second tracking circuit, third tracking circuit, fourth tracking circuit). Each tracking circuit is activated based on the least significant bits of the row address, distributing the activation load across multiple circuits. This segmentation reduces the number of times each individual tracking circuit is activated, thereby reducing transistor degradation while maintaining accurate signal development time measurement.
2Reliability
If multiple tracking circuits are used to reduce degradation, then transistor lifetime improves, but device complexity increases
Solution Approach 1:
The patent implements a universal control mechanism where the least significant bits of the row address are used to select which tracking circuit to activate. This multi-functional approach allows the same address bits to control the activation of different tracking circuits, eliminating the need for separate control logic for each tracking circuit. The multiplexer-based selection mechanism provides a simple and elegant solution that reduces device complexity while maintaining the benefits of multiple tracking circuits.
Data Source
AI summary
An embodiment of the invention discloses an electronic device for reducing degradation in NMOS circuits in a tracking circuit. A first multiplexer selects, based on N bits from a row address in a memory array, which tracking circuit from a group of 2N tracking circuits will be used to provide a signal develop time for a memory cell in the memory array using a dummy word line signal. A second multiplexer selects, based on the N bits from the row address for a memory array, which output from the tracking circuits is used to enable the sense amp enable signal.