Multiplication Accumulating Device Merging Product and Adder Stages
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Solution Overview
Problem
Existing multiplication accumulating devices require separate hardware blocks for multiplication and accumulation, leading to increased operation time and power consumption due to the need for additional adding operations.
Innovation Solution
A multiplication accumulating device and method that incorporate a product generator, registers, a product reducer, and an adder to perform simultaneous reduction and accumulation operations, reducing the need for additional adding operations by using a product reducer to append and reduce data in the registers, thereby improving circuit performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If separate hardware blocks for multiplication and accumulation are used, then the device can perform multiplication and accumulation operations, but the operation time increases and power consumption increases due to additional adding operations
Solution Approach 1:
The patent combines the multiplication and accumulation operations into a single integrated hardware block. The product generator generates partial products while the adder simultaneously accumulates them, eliminating the need for separate multiplication and accumulation stages. This merging of functions reduces the total operation time and eliminates redundant adding operations.
Solution Approach 2:
The adder performs accumulation operations on the partial products as they are generated, rather than waiting for all multiplication operations to complete. By preliminarily accumulating the partial products during their generation, the device reduces the overall operation time and avoids a final summation stage.
2Productivity
If separate hardware blocks for multiplication and accumulation are used, then the device can perform multiplication and accumulation operations, but the power consumption increases due to additional adding operations
Solution Approach 1:
The patent merges the multiplication and accumulation functions into a single operational stage where the adder accumulates partial products concurrently with their generation. This eliminates redundant adding operations that would otherwise consume additional power, thereby reducing overall power consumption while maintaining operational productivity.
Solution Approach 2:
The patent extracts and eliminates the redundant final summation stage that exists in conventional separate-block designs. By removing this unnecessary adding operation, the device reduces power consumption associated with redundant computational steps while preserving the essential multiplication and accumulation functionality.
3Reliability
If additional adding operations are performed, then the accumulation operation can be completed, but the device complexity increases
Solution Approach 1:
The patent combines the multiplication and accumulation operations into a single integrated stage with one adder that performs accumulation concurrently with product generation. This merging eliminates the need for multiple separate adders and multiple operational stages, thereby reducing hardware complexity while ensuring complete and accurate accumulation results.
Data Source
AI summary
A multiplication accumulating device and a method thereof are provided. The multiplication accumulating device includes a product generator, a plurality of registers, a product reducer, and an adder. The product generator performs a product operation on a multiplicand and a multiplier to generate a product result of 2N−1 columns. The product reducer is used to append data from a portion of the plurality of registers to the columns in the product result to generate an appending result of 2N−1 columns. The product reducer performs a reduction operation on the appending result according to a column height of each column in the appending result to obtain a reduced result. The product reducer renews the data in the plurality of registers according to the reduced result. The adder adds the data in the plurality of registers according to an accumulation signal to generate a multiplication accumulating operation result.