Multiplier Accumulator Digit Segmentation for Neural Network Processing
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Solution Overview
Problem
Existing neural network hardware implementations face challenges in achieving high-speed processing and low power consumption while maintaining accuracy, particularly in the saturation region of activation functions, where changes in input values have minimal impact on output accuracy.
Innovation Solution
The proposed solution involves a multiplier accumulator network unit with a coefficient storage, controller, high-order multiplier, high-order accumulator, low-order multiplier, and output unit, which designates target digits to efficiently calculate high-order and low-order multiplication values, determining when to stop processing based on boundary values to optimize processing speed and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional multiplier accumulators process all digits of coefficients in sequence, then calculation accuracy is maintained, but processing speed decreases and power consumption increases
Solution Approach 1:
The coefficient digits are segmented into high-order digits (processed by high-order multiplier and accumulator) and low-order digits (processed by low-order multiplier). This segmentation allows parallel processing of different digit groups, improving processing speed while maintaining accuracy through selective addition of low-order accumulation values based on boundary value comparisons.
Solution Approach 2:
The patent applies partial action by processing only the necessary high-order digits to determine if the boundary value is exceeded. When the boundary is exceeded, low-order digit processing is partially skipped, performing only the minimal necessary calculations to achieve the desired accuracy level for that specific input case.
2Measurement precision
If traditional multiplier accumulators process all digits of coefficients in sequence, then calculation accuracy is maintained, but power consumption increases
Solution Approach 1:
The coefficient digits are segmented into high-order digits (processed by high-order multiplier and accumulator) and low-order digits (processed by low-order multiplier). This segmentation allows parallel processing of different digit groups, improving processing speed while maintaining accuracy through selective addition of low-order accumulation values based on boundary value comparisons.
Solution Approach 2:
The patent applies partial action by processing only the necessary high-order digits to determine if the boundary value is exceeded. When the boundary is exceeded, low-order digit processing is partially skipped, performing only the minimal necessary calculations to achieve the desired accuracy level for that specific input case.
3Productivity
If the system selectively stops processing based on boundary values, then processing speed increases in saturation region, but device complexity increases
Solution Approach 1:
The coefficient digits are segmented into high-order digits (processed by high-order multiplier and accumulator) and low-order digits (processed by low-order multiplier). This segmentation allows parallel processing of different digit groups, improving processing speed while maintaining accuracy through selective addition of low-order accumulation values based on boundary value comparisons.
Solution Approach 2:
The high-order accumulator compares its output with a boundary value and feeds back this comparison result to the controller. The controller uses this feedback to dynamically control whether the low-order multiplier should execute, enabling adaptive processing speed optimization based on the saturation region detection.
Data Source
AI summary
According to an embodiment, a multiplier accumulator includes a controller, a high-order multiplier, a high-order accumulator, a low-order multiplier, and an output unit. The controller is configured to designate each digit within a range of the most significant digit in a coefficient for an input value to a stop digit as a target digit. The high-order multiplier is configured to calculate a high-order multiplication value by multiplying the input value, and a value and a weight of the target digit. The high-order accumulator is configured to calculate a high-order accumulation value by accumulatively adding the high-order multiplication values for input values. The low-order multiplier is configured to calculate a low-order multiplication value by multiplying an input value and a value of a digit smaller than the stop digit. The output unit is configured to output a value determined based on whether the high-order accumulation value exceeds a boundary value.


