Carry-Based Partial Product Encoding for Lower-Area Multiplier Circuits
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Solution Overview
Problem
Existing multiplier architectures in integrated circuits, particularly in AI and HPC applications, are inefficient in terms of area and power consumption, with limited improvements over decades.
Innovation Solution
Implement a carry-based radix 4 encoding scheme in multiplier circuits that reduces the number of possible codings by depending on previous encoders, using a counterintuitive approach to minimize gate usage and optimize performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If traditional Booth's coding scheme is used in multiplier circuits, then complete multiplication functionality is achieved, but the number of gates in partial product multiplexers increases leading to larger die area and higher power consumption
Solution Approach 1:
The patent extracts and removes redundant multiplication codes from the traditional Booth's coding scheme. By identifying and eliminating unnecessary codes that do not contribute to the multiplication result, the partial product multiplexers require fewer gates, directly reducing die area and power consumption while preserving the essential multiplication functionality.
Solution Approach 2:
The patent modifies the multiplication coding parameters by changing from the complete set of Booth's codes to a reduced set. This parameter change involves redefining which codes are generated and used in the multiplication process, optimizing the balance between coding completeness and circuit resource utilization.
2Use of energy by stationary object
If carry-based encoding is implemented to reduce gate count, then power consumption decreases, but the encoding becomes dependent on previous encoders increasing circuit complexity
Solution Approach 1:
The patent applies preliminary action by pre-calculating and propagating carry signals from previous encoder stages. This allows the current encoder to depend on predetermined carry information rather than requiring complex real-time interactions, reducing power consumption while managing complexity through structured carry propagation.
Solution Approach 2:
The patent implements feedback mechanisms where carry outputs from one encoder stage are fed back as inputs to the next stage. This feedback structure enables the carry-based encoding to function efficiently by reusing intermediate results, reducing overall power consumption while organizing complexity into a manageable sequential dependency chain.
Data Source
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AI summary
Integrated circuit devices, methods, and circuitry for an efficient multiplier are provided. Multiplier circuitry to multiply a multiplicand value with a multiplier value may include, among other things, input circuitry and carry-based coding circuitry. The input circuitry may receive the multiplicand value and the multiplier value. The carry-based coding circuitry may receive bits of the multiplier value and generate multiplication codes using a carry-based coding scheme that includes multiplication codes according to a Booth's coding scheme but with at least one multiplication code that is removed and replaced with another at least one multiplication code with a different value. A first encoder of the carry-based coding circuitry may receive a carry signal to adjust a multiplication code value of the first encoder based on a second encoder of the carry-based coding circuitry encoding the multiplication code with the different value.