Multi-Precision Multiplier Using Carry Compensation Terms

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Solution Overview

Problem

Existing multiplier designs require combining multiple low-precision multipliers to achieve high-precision multiplication operations, leading to significant hardware resource consumption and area overhead.

Innovation Solution

An operation method and apparatus that determines a carry compensation term for low-order input data sets, incorporating it into a target partial product array to cancel out carries during accumulation, allowing a single multiplier to perform multiplication operations with multiple precision without the need for multiple multipliers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple low-precision multipliers are combined to achieve high-precision multiplication operations, then the precision of multiplication operations is improved, but the hardware resource consumption and area overhead increase significantly

Engineering Contradiction:
Improveprecision of multiplication operationsVSAvoidhardware area overhead
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent segments the multiplication operation into multiple precision levels (low-precision and high-precision modes) that can be selectively activated. By dividing the input data into different bit-width categories and applying appropriate multiplication algorithms for each segment, the system achieves high-precision results without requiring multiple physical multipliers for each precision level.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal multiplier architecture that can function in multiple precision modes using the same hardware resources. A single multiplier unit is designed to adaptively perform both low-precision and high-precision multiplication operations by configuring its internal logic and data path width, eliminating the need for separate dedicated multipliers for different precision requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If multiple low-precision multipliers are combined to achieve high-precision multiplication operations, then the precision of multiplication operations is improved, but the hardware resource consumption increases

Engineering Contradiction:
Improveprecision of multiplication operationsVSAvoidhardware resource consumption
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent creates a universal multiplier architecture that can function in multiple precision modes using the same hardware resources. A single multiplier unit is designed to adaptively perform both low-precision and high-precision multiplication operations by configuring its internal logic and data path width, eliminating the need for separate dedicated multipliers for different precision requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the operational parameters of the multiplier (such as data width, accumulation depth, and precision mode) rather than changing the physical hardware configuration. By dynamically adjusting these parameters based on the required precision level, the system achieves multiple precision capabilities from a single fixed hardware resource, reducing both area and resource consumption.

Inventive Principle:
Principle #35Parameter changes

3Area of stationary object

If a single multiplier is used to perform multiplication operations with multiple precision, then the hardware area is reduced, but the accuracy of product operation results may be affected

Engineering Contradiction:
Improvehardware areaVSAvoidaccuracy of product operation results
Core Design Contradiction:
Area of stationary objectVSMeasurement precision

Solution Approach 1:

The patent applies beforehand cushioning by pre-calculating and storing correction terms that compensate for potential accuracy losses in single-multiplier architectures. These correction values are computed in advance based on the input data characteristics and are applied during the multiplication process to ensure that the final result achieves the required precision accuracy, preventing accuracy degradation before it occurs.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent implements feedback mechanisms where the output of the single multiplier is monitored and compared against expected precision thresholds. When the accuracy of product operation results falls below the required level, the system automatically adjusts operational parameters or activates correction algorithms to restore accuracy, ensuring that hardware area reduction does not compromise result precision.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240361985A1Operation method of multiplier, electronic device, and storage medium
Publication Date: 2024.10.31 BEIJING HORIZON INFORMATION TECH CO LTD
  • US20240361985A1 patent drawing
  • US20240361985A1 patent drawing
  • US20240361985A1 patent drawing

AI summary

Disclosed are an operation method of multiplier, an electronic device, and a storage medium. The method includes: determining a plurality of input data sets of the multiplier and an encoding manner for the multiplier; determining at least one low-order input data set in the plurality of input data sets; determining a carry compensation term corresponding to the at least one low-order input data set based on the at least one low-order input data set and the encoding manner; determining a target partial product array based on the carry compensation term corresponding to the at least one low-order input data set and the plurality of input data sets; and determining a product operation result for each input data set based on the target partial product array. According to this disclosure, multiplication operations with multiple precision may be implemented by using one multiplier, thereby reducing hardware resource consumption and hardware area.