Configurable Multiply-Accumulate Processing Block Sequencer
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Solution Overview
Problem
In integrated circuits, particularly programmable logic devices, there is a need to efficiently sequence arithmetic operations in signal processing applications, such as finite impulse response filters, where existing solutions lack efficient configuration and control mechanisms for arithmetic functions like multiply-accumulate operations.
Innovation Solution
An arithmetic circuit with a multiplier and configuration circuitry is designed, coupled with a sequencer circuit to implement different arithmetic functions by routing signals, and optionally includes an adder and register to perform accumulate functions, enabling efficient execution of arithmetic operations in specialized processing blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a specialized processing block is designed to perform multiple arithmetic functions, then the versatility of the device is improved, but the device complexity increases due to the need for configuration circuitry and multiple routing paths
Solution Approach 1:
The specialized processing block is designed with a single multiplier and adder that can be configured to perform multiple arithmetic functions including multiply-accumulate, multiply-subtract, and pure multiplication operations. The configuration circuitry routes input signals to different operational modes, allowing one hardware structure to fulfill multiple computational roles, thereby achieving versatility without proportionally increasing hardware complexity
Solution Approach 2:
The processing block incorporates dynamic configuration capability through control signals that can change the operational mode of the arithmetic unit during operation. The configuration circuitry allows the same hardware resources to be dynamically reassigned for different arithmetic functions based on the current computational requirements, enabling adaptive versatility
2Productivity
If a sequencer circuit is added to control the execution order of arithmetic operations, then the productivity of signal processing is improved, but the device complexity increases due to additional control circuitry
Solution Approach 1:
The sequencer circuit is pre-configured with operation codes that define the execution sequence of arithmetic operations. By preparing the control sequence in advance through programmable operation codes, the system can efficiently manage the timing and order of multiply-accumulate operations without requiring complex real-time control logic, thus improving productivity with manageable complexity
Solution Approach 2:
The sequencer circuit acts as an intermediary between the control unit and the arithmetic processing elements. It translates high-level operation commands into detailed control signals that coordinate the multiplier, adder, and data routing, thereby simplifying the overall control architecture while maintaining high productivity through standardized control sequences
3Adaptability or versatility
If configuration circuitry is implemented to route signals for different arithmetic functions, then the adaptability of the processing block is improved, but the loss of time for signal routing and configuration increases
Solution Approach 1:
The configuration circuitry is designed to switch between different arithmetic function modes in synchronized periodic cycles aligned with the clock signal. By pre-establishing routing paths for each operational mode and switching configurations at regular intervals rather than arbitrarily, the system minimizes transition overhead and configuration switching time while maintaining full adaptability across different arithmetic functions
Data Source
AI summary
An integrated circuit may have specialized processing blocks that are configurable to operate as arithmetic operators that may implement, amongst other functions, multiplication and multiply-accumulation operations in a first mode. In a second mode, a sequencer circuit may provide data signals and control signals to the specialized processing blocks such that the specialized processing block operates as a signal processing device that handles signals in a given sequence. For example, the sequencer circuit may control the signal arrival at the specialized processing block and the configuration of the configurable circuitry in the specialized processing block. In certain embodiments, the sequencer circuit and the specialized processing block may implement finite impulse response (FIR) filters.