Multiport Inductor Clock Signal Distribution
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Solution Overview
Problem
In digital communications, high symbol rates and electromagnetic interference cause intersymbol interference (ISI), making it difficult for receivers to accurately determine symbols, especially when combined with additive noise, and existing clock recovery modules face challenges in maintaining optimal sample timing and frequency stability in multi-channel environments.
Innovation Solution
The use of multiport inductors in integrated circuits, specifically with a drive port and a sense port positioned diametrically opposite on the outer perimeter, allows for the sharing of clock signals between circuit modules, reducing interference and increasing frequency stability by minimizing unwanted coupling effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single port inductor is used for clock signal distribution, then the device complexity is reduced, but the signal-to-noise ratio deteriorates due to longer driving distance and increased parasitic effects
Solution Approach 1:
The inductor is divided into multiple ports (drive port and sense ports) positioned at different locations around the inductor body. This segmentation allows multiple circuit modules to access clock signals from different ports, reducing the driving distance for each module and minimizing parasitic effects, thereby improving the signal-to-noise ratio without significantly increasing device complexity.
2Length of moving object
If circuit modules are positioned far from the inductor center, then the driving distance is reduced for those modules, but the electromagnetic interference increases due to unwanted coupling effects
Solution Approach 1:
The sense ports are extracted from the traditional center-tapped configuration and repositioned to the outer perimeter of the inductor, diametrically opposite to the drive port. This extraction and repositioning allows circuit modules to be placed closer to the inductor edges, reducing driving distance while the diametrically opposite positioning minimizes electromagnetic coupling between the drive port and sense ports, thereby reducing interference.
3Device complexity
If the sense port is positioned close to the inductor center, then the device complexity is reduced, but the frequency stability deteriorates due to increased parasitic effects and electromagnetic coupling
Solution Approach 1:
Instead of positioning the sense port along the traditional center-tap axis, the sense port is positioned in a different spatial dimension - diametrically opposite to the drive port on the outer perimeter of the inductor. This dimensional repositioning reduces parasitic effects and electromagnetic coupling, improving frequency stability while maintaining relatively simple device complexity.
4Productivity
If high symbol rates are used to increase productivity, then the data transmission speed is improved, but the intersymbol interference increases making symbol detection difficult
Solution Approach 1:
The multiport inductor configuration provides better clock signal distribution with reduced jitter and improved frequency stability to circuit modules operating at high symbol rates. This improved clocking reduces timing jitter and intersymbol interference, enabling more accurate symbol detection even at high data transmission speeds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances signal distribution and reduces power consumption by minimizing driving distance and parasitic effects, achieving improved signal-to-noise ratio and frequency stability, even at high symbol rates and frequencies above 2 GHz.
Implementation Method 1
An oscillator drive core is coupled to a drive port of the inductor to generate the oscillating signal on the drive port and the sense port
Data Source
AI summary
Integrated circuits such as multi-channel transceivers may share oscillators having loop inductors. To minimize the driving distance from the shared oscillators to the transceiver modules, the loop inductor may be equipped with an additional sense port diametrically opposite to the drive port. An oscillator drive core may be coupled to the drive port to provide an oscillating signal at the drive and sense ports. The oscillating signals can be converted into digital clock signals by way of a differential amplifier. Three-loop inductor designs and/or multi-winding inductor designs may be preferred for minimizing parasitic effects of the added sense port.