Multi-port Memory Serial I/O Ball Out Segmentation
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Solution Overview
Problem
Conventional multi-port memory devices with serial I/O interfaces face inefficiencies in package ball out configuration and power management due to the coexistence of high-speed serial I/O interfaces and low-speed DRAM parts, leading to unstable operation and difficulty in configuring a power layer.
Innovation Solution
The solution involves separating the package ball out regions for high-speed serial I/O interface and low-speed DRAM parts, with independent power supply arrangements for each, ensuring balanced loads and stable data I/O operations through differential pin structures and separate power/ground balls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single package ball out configuration is used for both serial I/O interface and DRAM part, then package structure is simplified, but package efficiency is degraded and operation stability is compromised
Solution Approach 1:
The package ball out configuration is divided into separate regions: a first package ball out region for the serial I/O interface part and a second package ball out region for the DRAM part. This segmentation allows each region to be optimized independently for its specific function, improving package efficiency while maintaining a relatively simple overall structure.
2Productivity
If transmission pins and reception pins are increased for multiple ports, then data I/O capability is improved, but package load balance becomes difficult to maintain
Solution Approach 1:
The differential structure is applied locally to the transmission pins and reception pins within the serial I/O interface part, ensuring that each pin has balanced package loads. This local application of quality control allows multiple ports to operate with high data I/O capability while maintaining package load balance through proper differential pairing.
3Reliability
If separate power supplies are provided for serial I/O interface and DRAM part, then operation stability is improved, but power layer configuration becomes difficult
Solution Approach 1:
The power supply system is segmented into separate power supplies for the serial I/O interface part and the DRAM part. This segmentation allows independent power management for each component, ensuring operation stability by preventing voltage fluctuations from one part from affecting the other, while the separate power layer regions make configuration manageable.
4Speed
If high-speed serial I/O interface and low-speed DRAM part operate together, then data transfer rate is improved, but power voltage stability is compromised
Solution Approach 1:
The package is segmented into separate power layer regions: a first power layer region for the serial I/O interface part and a second power layer region for the DRAM part. This segmentation isolates the power distribution paths, allowing the high-speed serial I/O interface to operate at high data transfer rates without causing voltage fluctuations to affect the low-speed DRAM part, thus maintaining power voltage stability.
Data Source
AI summary
A multi-port memory device includes a first package ball out region in which a plurality of balls for a serial I/O interface part are arranged; and a second package ball out region in which a plurality of balls for a dynamic random access memory (DRAM) part are arranged.