Multiport Semiconductor Memory Direct Access Control
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Solution Overview
Problem
Conventional multiport semiconductor memory devices do not allow each processor to directly access shared memory arrays, limiting the ability of multiple processors to communicate and boot efficiently in systems like mobile communication devices.
Innovation Solution
A multiport semiconductor memory device with a shared nonvolatile memory structure that enables direct access by multiple processors through a common access method, using a data path control unit and access authority information storage outside the memory cell array, allowing direct booting and data storage without a serial interface, and preventing access collisions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional multiport semiconductor memory devices use a shared memory structure, then multiple processors can access the memory, but each processor cannot directly access the shared memory arrays
Solution Approach 1:
The memory device is segmented into multiple independent memory arrays (first memory array, second memory array, etc.), where each processor can directly access specific memory arrays while still allowing shared access to common memory regions. This segmentation enables both direct and shared access capabilities simultaneously.
Solution Approach 2:
A controller acts as an intermediary between processors and memory arrays, managing access rights and routing signals. The controller enables processors to directly access designated memory arrays while coordinating shared access to common memory regions, resolving the contradiction between direct and shared access requirements.
2Device complexity
If processors communicate through a serial interface, then system complexity is reduced, but power consumption increases and booting performance deteriorates
Solution Approach 1:
The patent extracts the serial interface from the communication path between processors and memory, allowing processors to directly access memory arrays through parallel interfaces. This elimination of the serial interface reduces power consumption and improves booting performance while maintaining system accessibility.
Solution Approach 2:
The memory device provides multiple access interfaces simultaneously - both serial interface for compatibility and direct parallel access paths for high-speed operations. This multi-functionality allows the system to use the most efficient interface depending on the operation type, reducing overall power consumption while maintaining versatility.
3Ease of operation
If processors access shared memory through a host interface, then access control is simplified, but booting performance and system reliability are reduced
Solution Approach 1:
The system performs preliminary actions by pre-configuring direct access paths and establishing access rights before booting operations. Processors can directly access memory arrays for booting without going through the host interface, improving booting performance while the controller maintains access control through pre-established permissions.
Solution Approach 2:
Different access methods are applied to different memory regions based on local requirements. Critical booting and high-performance operations use direct parallel access paths for speed and reliability, while other operations can use the host interface for simplified control. This local differentiation optimizes both reliability and ease of operation.
Data Source
AI summary
A multiport semiconductor memory device and a multiprocessor system employing the same directly accesses a shared nonvolatile memory. The multiport semiconductor memory device includes a plurality of port units coupled with respective corresponding processors. A shared memory area is accessed by both the processors through the port units. A data path control unit controls a data path between the shared memory area and the port units and data transmission/reception is performed between the processors through the shared memory area. An access authority information storage unit is positioned outside of the memory cell array and stores information for an access authority of nonvolatile memory and provides the information to the processors. Accordingly, a direct access is performed by a processor indirectly connected to nonvolatile memory.