Multiprocessor Ring Bus Communication Restriction for Damaged Processor
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Solution Overview
Problem
In multiprocessor systems with a ring-type bus, the efficiency of data transmission is affected when a processor is damaged, leading to variations in program execution environments and processing speeds due to changes in data transmission paths and content.
Innovation Solution
A system that specifies and restricts communication for a processor connected at a determined position relative to the damaged processor, using a communication restricted processor to maintain data transmission efficiency and consistency across different processor damage scenarios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If arbitrary assignment of process to processors is performed when a processor is damaged, then the system can continue execution, but data transmission efficiency deteriorates due to changes in transmission paths and content
Solution Approach 1:
The patent applies local quality by making the communication restriction specific to processors at certain positions relative to the damaged processor. Instead of uniformly restricting all processors, only those at positions that would cause imbalance are restricted. This localized approach maintains overall system continuity while preserving data transmission efficiency by affecting only the necessary processors.
Solution Approach 2:
The patent implements dynamics by dynamically determining which processors to restrict based on the actual position of the damaged processor in the ring bus. The communication restriction is not fixed but adapts according to the damaged processor's location, allowing the system to maintain optimal performance regardless of which processor fails.
2Reliability
If process assignment is changed to exclude damaged processor, then the damaged processor is bypassed, but program execution environment varies depending on which processor is damaged
Solution Approach 1:
The patent applies asymmetry by introducing asymmetric communication restriction based on the position of the damaged processor. Processors at specific positions relative to the damaged one are restricted, creating an asymmetric pattern that compensates for the damage. This asymmetric approach maintains execution environment consistency across different failure scenarios.
Solution Approach 2:
The patent changes the parameter of communication restriction from a fixed state to a dynamic state that depends on the damaged processor's position. By changing which processors are restricted based on position parameters, the system maintains consistent execution environments regardless of which processor is damaged.
3Productivity
If communication restriction is applied to maintain data transmission efficiency, then transmission efficiency is preserved, but system complexity increases due to position determination and selective restriction
Solution Approach 1:
The patent applies preliminary action by pre-establishing the relationship between processor positions and communication restrictions. The system determines which processors to restrict based on predetermined positional relationships, avoiding complex real-time calculations and reducing control mechanism complexity.
Data Source
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AI summary
To provide a multiprocessor system in which data transmission efficiency is unlikely to be affected if a damaged processor should exist among a plurality of processors. The multiprocessor system has a plurality of processing modules, including a predetermined number, being three or more, of processors, and a bus for relaying data transmission among the respective processing modules, and specifies at least one damaged processor; selects as a communication restricted processor subjected to communication restriction at least one of the processors connected to the bus at a position determined according to a position where the damaged processor is connected to the bus; and restricts data transmission by the communication restricted processor via the bus.