Multi-Processor Cache Governance for Contended Fetch Requests

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Solution Overview

Problem

In computing environments with multiple processor chips and shared caches, high address contention leads to inefficiencies and delays in servicing fetch requests, particularly when read-only and exclusive fetch requests are handled sequentially, causing unfairness and reduced responsiveness.

Innovation Solution

Implementing cache governance logic that allows for concurrent allocation of a second cache controller when a first cache controller is in a state to return a cache line, and copying metadata from the first to the second controller to handle overlapping fetch requests, ensuring fairness and responsiveness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sequential handling of fetch requests is used to maintain cache controller state consistency, then cache coherency is preserved, but system responsiveness and throughput deteriorate under high address contention

Engineering Contradiction:
Improvecache coherencyVSAvoidfetch request throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the cache controller functionality into multiple independent cache controllers (first cache controller and second cache controller). Each controller can independently handle fetch requests for the same cache line, allowing parallel processing of read-only and exclusive requests without sequential bottlenecks, thus improving throughput while maintaining coherency through independent state tracking.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements copying of metadata from the first cache controller to the second cache controller. This copying mechanism allows the second controller to obtain necessary state information (such as cache line validity, ownership, and coherency status) without blocking on the first controller, enabling concurrent request handling while preserving cache coherency through replicated state information.

Inventive Principle:
Principle #26Copying

2Device complexity

If a single cache controller is allocated to handle fetch requests to maintain simplicity, then device complexity is reduced, but fairness and responsiveness deteriorate when multiple requests target the same cache line

Engineering Contradiction:
Improvecache controller structureVSAvoidrequest fairness
Core Design Contradiction:
Device complexityVSEase of operation

Solution Approach 1:

The patent divides the single cache controller into multiple specialized controllers (first cache controller for read-only requests, second cache controller for exclusive requests). This segmentation allows each controller to be optimized for its specific request type, improving fairness by preventing read-only requests from blocking exclusive requests and vice versa, while maintaining manageable complexity through clear functional separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent assigns different functional qualities to different cache controllers based on their allocation purpose. The first cache controller is optimized for read-only operations with appropriate metadata tracking, while the second cache controller is optimized for exclusive operations with different state management. This local quality differentiation enables each controller to handle its specific request type efficiently and fairly without interfering with other request types.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If read-only fetch requests are serviced before exclusive fetch requests to maintain simplicity, then implementation complexity is reduced, but responsiveness and fairness deteriorate when exclusive requests are delayed

Engineering Contradiction:
Improvecache governance implementationVSAvoidexclusive request waiting time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent segments the fetch request handling into separate pathways through different cache controllers. Read-only requests are routed to the first cache controller while exclusive requests are routed to the second cache controller. This segmentation eliminates the sequential ordering constraint, allowing exclusive requests to be serviced immediately without waiting for read-only requests, thus reducing waiting time while maintaining implementation simplicity through clear request routing rules.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces metadata copying as an intermediary mechanism between the first and second cache controllers. This intermediary process allows the second controller to quickly obtain necessary state information from the first controller without blocking on read-only request completion, enabling fast forwarding of exclusive requests while maintaining implementation simplicity through a standardized metadata transfer protocol.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12423234B1Cache governance in a computing environment with multiple processors
Publication Date: 2025.09.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12423234B1 patent drawing
  • US12423234B1 patent drawing
  • US12423234B1 patent drawing

AI summary

A computer-implemented method for cache governance includes receiving, at a local cache of a processor chip, a first fetch request for data for a cache line of the local cache. The method further includes allocating a first cache controller to allow the first fetch request to receive the data and to track reception of the data. The method further includes receiving, at the local cache of the processor chip, a second fetch request for the data for the cache line of the local cache. The method further includes determining via an address compare logic associated with the local cache whether the first fetch request in the first cache controller is for a same cache line that the second fetch request is targeting. The method further includes allowing the second fetch request to allocate a second cache controller and copying metadata from the first cache controller to the second cache controller.