Multiprocessor Core Dump via Inter-Processor Interrupts
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Solution Overview
Problem
Existing core dump mechanisms fail to capture the states of all processors and hardware blocks in a multiprocessor device, limiting the completeness of failure analysis by only saving the states of resources where the error occurred, whereas the proposed techniques enable capturing core dumps from all processors and hardware blocks, providing a more comprehensive snapshot of the device state at the time of a crash.
Innovation Solution
The solution involves detecting errors in a multiprocessor device, triggering inter-processor interrupts to halt all processors, storing processor core dumps in a memory subsystem, and then copying these dumps to non-volatile memory to generate a device core dump, which includes the states of processors and hardware blocks, regardless of the processor where the error occurred, without relying on an operating system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If existing core dump mechanisms are used, then the device can save the state of the processor where the error occurred, but it fails to capture the states of all processors and hardware blocks, limiting the completeness of failure analysis
Solution Approach 1:
The patent divides the core dump generation process into distinct segments: (1) error detection by individual processors, (2) inter-processor interrupt propagation to halt all processors, (3) core dump generation by each processor independently, and (4) aggregation of all processor core dumps into a complete device core dump. This segmentation allows each processor to contribute its state independently while achieving comprehensive device state capture.
Solution Approach 2:
The patent merges the core dump data from all individual processors into a single comprehensive device core dump. Each processor generates its own core dump containing its state, and these are combined with states of hardware blocks to create a complete device snapshot. This merging transforms partial information from individual processors into complete device-state information.
2Measurement precision
If inter-processor interrupts are triggered to halt all processors, then all processor states can be captured contemporaneously with the crash, but the device complexity increases
Solution Approach 1:
The patent implements preliminary action by having processors pre-configured with interrupt handling capabilities and core dump generation logic. When an error occurs, the erroring processor immediately triggers an inter-processor interrupt to all other processors, which are pre-programmed to halt and generate their core dumps. This preliminary preparation ensures rapid, synchronized state capture without requiring complex real-time coordination during the actual crash event.
3Loss of information
If core dumps from all processors are stored in memory subsystem and copied to non-volatile memory, then a complete device core dump is generated, but the time and resources required increase
Solution Approach 1:
The patent applies preliminary action by having each processor generate and store its core dump in the memory subsystem immediately upon halting, before the system fully shuts down. This preliminary storage ensures that all processor states are captured and preserved in volatile memory while still accessible. The subsequent copying to non-volatile memory is then a straightforward data transfer operation rather than a complex generation process, reducing overall time loss.
Data Source
AI summary
Techniques for obtaining a device core dump in a multiprocessor device may include detecting an occurrence of an error in a processor of a multiprocessor device, and trigger an inter-processor interrupt from the processor in which the error occurred to each of the other processors of the multiprocessor device to halt operation of the multiprocessor device. Processor core dumps corresponding to the processors can then be stored in a memory subsystem. A determination can be made that a data ready indication for each of the processors has been set to indicate that the corresponding processor core dump has been stored in the memory subsystem. The processor core dumps can then be copied from the memory subsystem to a non-volatile memory to generate a device core dump in the non-volatile memory.