Multiprocessor SoC Data Streaming Unit for Memory Bottlenecks

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Solution Overview

Problem

Multiprocessor systems face performance bottlenecks due to shared memory resource access and memory coherency issues, particularly in complex computation tasks like real-time machine-vision, where multiple processors accessing the same memory locations can lead to delays and inefficiencies.

Innovation Solution

The implementation of a multiprocessor system that includes a Data Streaming Unit (DSU) to pre-fetch data from main memory and store it in local memories for each processing core, and a Scratch-Pad Unit to handle concurrent access to shared memory locations, ensuring efficient arbitration and memory coherency through dedicated processors and small local memories.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple processors share main memory resources, then system integration density is improved, but memory access performance and coherency are degraded

Engineering Contradiction:

Improvesystem integration densityVSAvoidmemory access performance

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The patent divides the memory system into two segments: main memory for bulk storage and local memories attached to each processing core for fast access. This segmentation allows processors to access frequently used data from local memories without contending for main memory resources, thereby maintaining high integration density while improving memory access performance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a data streaming unit as an intermediary between main memory and processing cores. This unit pre-fetches data from main memory and stores it in local memories, acting as a buffer that decouples the slow main memory access from the fast processing requirements, thus resolving the performance degradation caused by shared memory access.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If multiple processors access shared memory concurrently, then computation parallelism is improved, but memory coherency and arbitration overhead are worsened

Engineering Contradiction:

Improvecomputation parallelismVSAvoidmemory coherency management

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent assigns different memory access characteristics to different processing cores, with each core having its own local memory for private data and access to main memory for shared data. This local quality approach allows concurrent access patterns to be optimized per-core while maintaining system-wide coherency through the data streaming unit's coordinated pre-fetching and arbitration.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS9075764B2Multiprocessor system-on-a-chip for machine vision algorithms

Publication Date: 2015.07.07 APPLE INC

AI summary

A multiprocessor system includes a main memory and multiple processing cores that are configured to execute software that uses data stored in the main memory. In some embodiments, the multiprocessor system includes a data streaming unit, which is connected between the processing cores and the main memory and is configured to pre-fetch the data from the main memory for use by the multiple processing cores. In some embodiments, the multiprocessor system includes a scratch-pad processing unit, which is connected to the processing cores and is configured to execute, on behalf of the multiple processing cores, a selected part of the software that causes two or more of the processing cores to access concurrently a given item of data.