Multi-Processor System with Dynamic Power Mode Switching

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Solution Overview

Problem

Conventional multi-processor electronic systems face challenges in balancing processing power with battery life, as high processing capabilities lead to rapid battery discharge, requiring frequent recharging and reducing mobility, and existing solutions either compromise on performance or increase costs and hardware redundancy.

Innovation Solution

A multi-processor electronic system that allows concurrent operation of multiple operating systems on multiple processors, enabling seamless switching between them to optimize power consumption by designating high and low power modes based on application requirements, and facilitates the sharing of peripherals among operating systems to reduce hardware redundancy and enhance battery life.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high processing power is provided, then computing capability is improved, but battery consumption increases and battery life decreases

Engineering Contradiction:
Improveprocessing powerVSAvoidbattery life
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The system dynamically switches between high-performance processor and low-power processor based on application requirements. The operating system migrates between processors depending on whether high processing power or low power consumption is needed, making the system's processing capability adaptable rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system divides processing tasks between two distinct processors - a high-performance processor for computationally intensive tasks and a low-power processor for basic operations. This segmentation allows the system to allocate processing power selectively rather than continuously using full power.

Inventive Principle:
Principle #1Segmentation

2Productivity

If high capacity batteries are used to support increased processing power, then processing capabilities are improved, but device weight increases

Engineering Contradiction:
Improveprocessing capabilitiesVSAvoiddevice weight
Core Design Contradiction:
ProductivityVSWeight of moving object

Solution Approach 1:

Instead of providing continuous high processing power that would require large batteries, the system dynamically adjusts processing power based on task requirements. The low-power processor handles basic operations during mobile use, reducing the need for high-capacity batteries and thereby reducing device weight.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the processing power parameter by switching between two processors with different power characteristics. This allows the device to maintain high processing capabilities when needed while operating at lower power levels during normal use, reducing battery size requirements and device weight.

Inventive Principle:
Principle #35Parameter changes

3Weight of moving object

If existing batteries are continued to be used, then device weight is maintained, but battery discharge speed increases and frequent charging is required

Engineering Contradiction:
Improvedevice weightVSAvoidbattery life
Core Design Contradiction:
Weight of moving objectVSDuration of action of moving object

Solution Approach 1:

The system dynamically switches to the low-power processor when battery life is critical or during mobile usage, extending the effective battery life without requiring larger batteries or weight increases. The operating system monitors power consumption and migrates tasks accordingly.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system periodically evaluates power consumption patterns and switches between processors based on current needs. During periods of high activity, the high-performance processor is used; during periods of lower activity or when battery life is prioritized, the low-power processor takes over, creating a periodic optimization cycle.

Inventive Principle:
Principle #19Periodic action

4Use of energy by moving object

If multiple operating systems are run concurrently on multiple processors, then power consumption optimization is achieved, but system complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The system merges the functionality of two operating systems into a single unified system where one OS runs on the high-performance processor and another runs on the low-power processor. The MPMRIOV switch and PIVU coordinate between them, allowing seamless operation and peripheral sharing while managing complexity through integration rather than complete separation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The MPMRIOV switch and Peripheral and Interface Virtualization Unit (PIVU) act as intermediaries that manage communication and resource sharing between the two processors running different operating systems. This intermediary layer abstracts the complexity, allowing each OS to operate independently while sharing peripherals through standardized interfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8938568B2Multi-processor electronic systems
Publication Date: 2015.01.20 SOCTRONICS INC
  • US8938568B2 patent drawing
  • US8938568B2 patent drawing
  • US8938568B2 patent drawing

AI summary

Disclosed herein is a system having a multi-processor configuration for electronics devices and systems, such as, computing and communication devices like laptop, notebook, tablets, smartphones, etc. In accordance with one embodiment of the subject matter the system comprises a plurality of processors and a multi protocol multi-root input output virtualization (MPMRIOV) switch communicatively coupled to at least one of the plurality of processors. The system further includes a peripheral and interface virtualization unit (PIVU) coupled to the MPMRIOV switch. In said embodiment, the PIVU is configured to communicatively couple at least one of the plurality of processors with at least one of a Peripheral Component Interconnect (PCI) compliant peripheral, a Peripheral Component Interconnect express (PCIe) compliant peripheral, a non PCI compliant peripheral, and a non PCIe compliant peripheral.