Multi-Die FPGA Placement via Parallel Child Processes

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Solution Overview

Problem

Existing placement and routing algorithms for FPGAs do not effectively utilize multiple processors or massive multi-threading across the entire placement flow, leading to quality of results (QoR) loss and inefficiencies in runtime due to bottlenecks in shared resources and inability to optimize critical paths across die boundaries.

Innovation Solution

The implementation of a multi-processing flow (MPF) and massively multi-threaded (MMT) flow that partitions circuit designs into smaller portions for parallel placement on multiple dies, using child processes and thread pools to optimize placement and routing independently on each die, thereby avoiding QoR loss and improving runtime.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If multiple processors or massive multi-threading are used to speed up placement algorithms, then runtime is reduced, but quality of results deteriorates due to inability to optimize critical paths across die boundaries

Engineering Contradiction:
Improveplacement algorithm runtimeVSAvoidquality of results
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The patent applies segmentation by dividing the multi-die device into separate die regions, with each child process or thread pool responsible for placement optimization on a specific die. This segmentation allows parallel processing across dies while maintaining the ability to optimize critical paths within each die boundary, resolving the contradiction between runtime reduction and quality of results.

Inventive Principle:
Principle #1Segmentation

2Productivity

If placement algorithms scale beyond four to eight threads, then more processors can be utilized, but bottlenecks in shared resources prevent further runtime improvement

Engineering Contradiction:
Improveprocessor utilizationVSAvoidplacement algorithm runtime
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the placement task by creating a separate context with isolated data structures for each die, allowing thread pools to scale beyond eight threads without encountering shared resource bottlenecks. Each thread operates independently on its designated die, eliminating contention for shared resources while maintaining high processor utilization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by generating isolated data structures specific to each die's context, allowing each thread or process to operate with locally optimized data without interfering with other dies. This enables efficient scaling of thread count while maintaining placement quality and avoiding shared resource bottlenecks.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If conventional single-processing flow is used, then placement can be completed sequentially, but runtime is excessive and does not utilize available computational resources

Engineering Contradiction:
Improveplacement completionVSAvoidplacement runtime
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies segmentation by creating multiple child processes, each handling placement for a specific die or portion of the design. This divides the monolithic placement task into parallelizable sub-tasks, enabling simultaneous execution on multiple processors and dramatically reducing total runtime while maintaining placement quality through dedicated processing for each segment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-processing to parallel multi-processing by adding the dimension of concurrent execution. Multiple child processes and thread pools execute placement algorithms simultaneously on different dies or design portions, utilizing available computational resources efficiently while reducing overall placement runtime.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11003827B1Multiprocessing flow and massively multi-threaded flow for multi-die devices
Publication Date: 2021.05.11 XILINX INC
  • US11003827B1 patent drawing
  • US11003827B1 patent drawing
  • US11003827B1 patent drawing

AI summary

Examples described herein provide a non-transitory computer-readable medium storing instructions, which when executed by one or more processors, cause the one or more processors to perform operations. The operations include: generating, using the one or more processors, a plurality of child processes according to a number of programmable dies of the multi-die device, each of the plurality of child processes corresponding to a respective programmable die of the multi-die device, wherein the plurality of child processes execute on different processors; partitioning a design for the multi-die device into a plurality of portions, each of the portions to be used to configure one of the programmable dies of the multi-die device; transmitting the plurality of portions of the design to the plurality of child processes for placement; and receiving placements from the plurality of child processes.