Multiprocessor Memory Allocation for Activity Sequences

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Solution Overview

Problem

In multiprocessor systems, existing methods for implementing UML activity diagrams do not efficiently manage memory allocation and block assignment during runtime, leading to potential interruptions or slowdowns when activities require memory buffers, as these processes are typically performed sequentially and can interfere with data processing.

Innovation Solution

A multiprocessor computer architecture that interweaves the performance of activity sequences with block assignment processes, allowing for just-in-time allocation and release of memory blocks, ensuring that memory allocation is completed before activity sequences commence, and unused blocks are identified and powered down to conserve resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory allocation and block assignment are performed sequentially before activity sequences, then memory resources are properly allocated, but processing time is increased and performance is hindered

Engineering Contradiction:
Improvememory allocation correctnessVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by performing memory allocation and block assignment just-in-time before each activity sequence commences, rather than allocating all memory upfront or during runtime interruptions. This ensures memory is ready when needed without hindering overall processing speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent enables continuous processing by interweaving memory allocation with activity execution seamlessly. Memory allocation occurs in the background during transitions between activities rather than interrupting the data processing flow, maintaining continuous useful action.

Inventive Principle:
Principle #20Continuity of useful action

2Reliability

If memory blocks are allocated in advance for all activities, then sufficient memory resources are available, but unused memory blocks consume energy unnecessarily

Engineering Contradiction:
Improvememory availabilityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by allocating memory blocks specifically to activities based on their individual requirements rather than providing universal memory allocation to all activities. Each activity receives memory blocks locally assigned just-in-time, ensuring no unused blocks consume energy.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements discarding and recovering by releasing memory blocks back to the pool after each activity completes its execution. This allows memory to be dynamically reused for subsequent activities rather than being permanently allocated, reducing energy consumption from unused blocks.

Inventive Principle:
Principle #34Discarding and recovering

3Adaptability or versatility

If block assignment is performed during activity execution, then memory can be allocated dynamically, but processing is interrupted or slowed down

Engineering Contradiction:
Improvedynamic memory allocationVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent applies preliminary action by completing all block assignment operations before an activity sequence commences. This preliminary preparation ensures dynamic memory allocation is achieved without interrupting the actual processing execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary layer between memory management and activity execution. The memory management system operates in the background during transitions, acting as an intermediary that prepares memory without directly interfering with the speed of data processing activities.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9158580B2Data flows and their interaction with control flows
Publication Date: 2015.10.13 U-BLOX
  • US9158580B2 patent drawing
  • US9158580B2 patent drawing
  • US9158580B2 patent drawing

AI summary

A method and apparatus for processing data by a computer and a method of determining data storage requirements of a computer for earning out a data processing task.