Multiprocessor Memory Switch Circuit for Resource Sharing

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Solution Overview

Problem

In multiprocessor systems, managing memory resources efficiently is challenging, especially when microprocessors operate in different modes, leading to inefficient use of memory resources due to lack of effective switching and sharing mechanisms.

Innovation Solution

A circuit with a switch that can operate in two modes: one for independent microprocessor operation and another for lockstep or single processor mode, allowing memory interfaces to be combined, enabling both memory circuits to be utilized when microprocessors operate non-independently, by selectively coupling memory circuits to the appropriate microprocessor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory circuits are dedicated to specific microprocessors for independent operation, then memory access reliability is improved, but memory resource utilization deteriorates when microprocessors operate in lockstep or single processor mode

Engineering Contradiction:
Improvememory access reliabilityVSAvoidmemory resource utilization
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The switch circuit dynamically reconfigures memory circuit assignments based on operational mode. In independent mode, each memory circuit is dedicated to its associated microprocessor for reliable access. In lockstep or single processor mode, the switch circuit redirects both memory circuits to the active microprocessor, optimizing resource utilization while maintaining access reliability through controlled reconfiguration.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The switch circuit enables memory circuits to serve multiple functions: dedicated access during independent microprocessor operation and shared access during lockstep or single processor operation. This multi-functionality allows the same memory circuits to be efficiently utilized across different operational scenarios, preventing resource wastage while maintaining reliable access.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of energy

If memory circuits are shared between microprocessors, then memory resource utilization is improved, but access time increases due to switching overhead

Engineering Contradiction:
Improvememory resource utilizationVSAvoidmemory access time
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The switch circuit performs preliminary configuration of memory access paths based on the operational mode. When transitioning to lockstep or single processor mode, the switch circuit pre-establishes the redirected connections to the active microprocessor before memory access operations begin, minimizing switching overhead and access time delays.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If a switch circuit is added to enable flexible memory sharing, then memory adaptability is improved, but device complexity increases

Engineering Contradiction:
Improvememory sharing flexibilityVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The switch circuit acts as an intermediary component that mediates between memory circuits and microprocessors. This single intermediary element provides flexible memory sharing capabilities across different operational modes without requiring complex reconfiguration of each memory circuit or microprocessor interface, thereby achieving high adaptability with minimal added complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3198455B1Managing memory in a multiprocessor system
Publication Date: 2019.05.22 XILINX INC
  • EP3198455B1 patent drawingFigure 1
  • EP3198455B1 patent drawingFigure 2
  • EP3198455B1 patent drawingFigure 3

AI summary

In an example, a circuit (100) to manage memory between a first and second microprocessors (102, 104) each of which is coupled to a control circuit (106), includes: first and second memory circuits (112, 1 14); and a switch circuit (110) coupled to the first and second memory circuits, and memory interfaces (210-0, 210-1) of the first and second microprocessors, the switch circuit having a mode signal as input. The switch is configured to selectively operate in one of a first mode or a second mode based on the mode signal such that, in the first mode, the switch circuit couples the first memory circuit to the memory interface of the first microprocessor and the second memory circuit to the memory interface of the second microprocessor and, in the second mode, the switch circuit selectively couples the first or second memory circuits to the memory interface of either the first or second microprocessor.