Multiprocessor Multicast Buffer Segmentation for Communication Overhead

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing multiprocessor systems face inefficiencies in inter-processor communication, particularly in handling multicast and unicast messages, which can lead to increased overhead and reduced performance in message transmission between processors.

Innovation Solution

The implementation of a multiprocessor apparatus with a common buffer unit for multicast messages and a transmitting buffer unit for unicast messages, coupled with a direct memory access (DMA) control unit that enables efficient communication between processors by reading and writing messages independently of the processor cores, using a bus system to facilitate direct memory access and acknowledgment signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multicast messages are handled using the same buffer as unicast messages, then buffer management is simplified, but communication efficiency and performance deteriorate due to increased overhead and inability to prioritize message types

Engineering Contradiction:
Improvebuffer management complexityVSAvoidcommunication efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The buffer unit is segmented into a common buffer for multicast messages and a transmitting buffer for unicast messages. This segmentation allows independent management of different message types, enabling prioritized processing of urgent multicast messages while maintaining efficient unicast communication, thus resolving the contradiction between buffer management simplicity and communication efficiency.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If processor cores directly handle all message transmission, then control is centralized, but operational overhead increases and performance decreases due to processor busyness

Engineering Contradiction:
Improvecontrol centralizationVSAvoidoperational overhead
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

An inter-processor communication (IPC) unit is introduced as an intermediary between processor cores and the buffer unit. The IPC unit handles message reading, writing, and transmission operations, allowing processor cores to offload communication tasks. This reduces operational overhead and improves performance while maintaining centralized control through the IPC unit's coordinated message handling.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If urgent multicast messages are processed sequentially with unicast messages, then processing order is simplified, but message transmission speed deteriorates

Engineering Contradiction:
Improveprocessing order complexityVSAvoidmessage transmission speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The system implements dynamic processing where the IPC unit can prioritize and process urgent multicast messages from the common buffer independently of unicast messages in the transmitting buffer. This dynamic handling allows urgent multicast messages to be transmitted immediately without waiting for sequential processing, improving message transmission speed while maintaining manageable processing complexity through buffer-based organization.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8891523B2Multi-processor apparatus using dedicated buffers for multicast communications
Publication Date: 2014.11.18 SAMSUNG ELECTRONICS CO LTD
  • US8891523B2 patent drawing
  • US8891523B2 patent drawing
  • US8891523B2 patent drawing

AI summary

An apparatus includes a multiprocessor including a plurality of processors including respective memories. Each of the memories has a dedicated storage location for multicast messages. At least one bus is coupled in common to the plurality of processors. The apparatus further includes an IPC unit coupled to the at least one bus and configured to retrieve multicast messages from the dedicated storage locations via the at least one bus and to selectively route the retrieved multicast messages among the plurality of memories.