Multiprocessor Shared Memory Queue Pointer Management
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Solution Overview
Problem
Multiprocessor systems face inefficiencies in message transmission and reception due to the need for complex pointer comparisons and potential latency issues when determining vacancy status in shared memory queues, which complicates the design and scalability of the system.
Innovation Solution
The system employs separate pointers for managing vacancy status in message queues, allowing coincidence detection between head and tail pointers to determine transmission and reception capabilities without size comparisons, thereby simplifying the circuit design and reducing latency by local memory access for pointer reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex pointer comparisons and size checks are used to determine vacancy status in shared memory queues, then transmission and reception accuracy is improved, but circuit scale increases and latency increases
Solution Approach 1:
The patent divides the queue management into separate head pointer and tail pointer structures, with the head pointer stored in transmit processor memory and the tail pointer stored in receive processor memory. This segmentation allows each processor to independently manage its own pointer without requiring complex comparison circuits, thereby reducing circuit scale while maintaining accurate vacancy status determination through local pointer access.
Solution Approach 2:
The patent introduces an intermediary mechanism where the head pointer value is copied to the tail pointer structure as a reference point. This intermediary approach allows the receive processor to determine vacancy status by comparing the tail pointer against the copied head pointer value locally, eliminating the need for complex real-time comparisons between processors and reducing both circuit complexity and latency.
2Measurement precision
If complex pointer comparisons and size checks are used to determine vacancy status in shared memory queues, then transmission and reception accuracy is improved, but transmission and reception speed decreases
Solution Approach 1:
By segmenting the pointer management so that the head pointer is maintained in transmit processor memory and the tail pointer in receive processor memory, the system enables parallel access to pointer values. This segmentation eliminates sequential comparison operations and allows both processors to determine vacancy status independently and simultaneously, thereby improving transmission and reception speed while maintaining accuracy.
Solution Approach 2:
The patent performs preliminary action by pre-copying the head pointer value to the tail pointer structure before actual message transmission and reception operations. This preliminary setup allows the receive processor to immediately determine vacancy status using locally stored pointer values without requiring real-time computations, thus accelerating message processing speed while preserving determination accuracy.
3Stability of the object's composition
If pointer size comparisons and wrap-around processes are implemented, then queue boundary management is improved, but circuit scale increases
Solution Approach 1:
The patent extracts the complex pointer size comparison and wrap-around detection logic from the hardware circuit implementation. Instead of implementing these checks in circuitry, the system manages queue boundaries through software-based pointer arithmetic and overflow detection, thereby significantly reducing circuit scale while maintaining stable queue boundary management through programmed logic.
Solution Approach 2:
The patent replaces mechanical/circuit-based pointer comparison and wrap-around detection mechanisms with software-based solutions. By using programmed algorithms to handle pointer arithmetic, boundary detection, and overflow management, the system achieves stable queue boundary management without requiring additional comparison circuits, thus reducing overall circuit complexity.
4Reliability
If complex pointer comparisons and size checks are used to determine vacancy status in shared memory queues, then transmission and reception reliability is improved, but latency increases
Solution Approach 1:
The patent segments the pointer management functionality so that each processor maintains its own pointer in local memory, enabling independent and immediate vacancy status determination. This segmentation eliminates the need for processors to wait for complex comparison operations to complete, thereby reducing latency while maintaining transmission and reception reliability through locally verified pointer states.
Solution Approach 2:
The patent uses an intermediary approach where the head pointer value is copied to a location accessible by the receive processor, serving as a reference for vacancy determination. This intermediary mechanism allows the receive processor to reliably determine queue status by comparing its tail pointer against the copied head pointer value without requiring real-time communication or complex synchronization, thus minimizing latency while ensuring reliable message transmission and reception.
Data Source
AI summary
A multiprocessor system includes a shared memory, and first and second processors. The shared memory includes a queue configured to store messages. The first processor transmits the messages to the shared memory. The second processor receives the messages stored in the shared memory. The first memory stores a first head pointer indicating a vacant position head of the queue and a first tail pointer indicating a vacant position tail of the queue. The second memory stores a second head pointer indicating a position of a head of the messages stored in the queue and a second tail pointer indicating a tail position of the messages stored in the queue. The first processor increments the first head pointer and copies a value identical to a value of the first head pointer to the second tail pointer, when transmitting the messages.